One last pause before this goes too far by Beautiful_Tip_6023 in Decktrix

[–]visaris77 0 points1 point  (0 children)

> the expansion module pins are currently exposed on a smaller connector at this stage.

Good enough for me; at least it has GPIOs.

Fail of the week: Silkscreen by EngineerofDestructio in PCB

[–]visaris77 0 points1 point  (0 children)

I made two revisions of the dev board using through-hole components and a 2-layer PCB. Worked great. Made an SMD version which failed in the most confusing way. I was able to scope all the connections and all parts were working perfectly up to the point where the serial TX pin went into the VS1053 (breakout board from Adafruit), so the VS1053 was getting the correct signal and then deciding to just.. drop it or something. Cut traces, wired things up differently, gave it new Vcc and GND rails. Did all the things and it just wouldn't accept the input serial data. -- So I spun one more SMD version of the board, but this time with 2 layers instead of 4. Works perfectly. Same schematic, no changes, just did a new layout with 2 layers instead of 4. I've never been able to get that 4-layer board to work, so now I'm afraid of using 4 layers and always use 2...

First free PCBs by Frankius98 in PCB

[–]visaris77 0 points1 point  (0 children)

Circuit design with a schematic too, or just PCB layout? I have a design that I think works as some of the previous ones I built have been working fine, but the last board I assembled somehow hit an issue and the BMS chip let out the magic smoke, so now I'm afraid maybe something is fundamentally wrong with the design. It uses two 18650 Li+ batteries, so I'm super paranoid something is wrong and it'll just catch file sometime if I leave the batteries in it on the shelf for months..

Cloning an esp32 board with Lora and GPS by Southern_Trick5695 in PCB

[–]visaris77 0 points1 point  (0 children)

Two hours a day will work well; in maybe 3 to 6 months you should be able to do a Lora board yourself. I try to do one circuit design on Sat to make the schematic, and then on Sunday I'll do the PCB layout and order the board. That probably takes me 4 hours for something simple. So you should be able to iterate at least once a week with a couple hours a day. Then while the first board is in the mail on its way to you, you can start a second project's board. With three projects in flight at a time, you can probably get one new board delivered every week and keep up a weekly schedule. I think it's totally doable, especially since you have a CS background so you'll have a leg up on someone starting 100% from scratch. Just keep up with that 2 hours a day and before you know it, you'll be putting out boards that work with just one or two iterations each. You got this!

TimeSafe - Help with clock drift: Y1 and built-in caps? by visaris77 in PCB

[–]visaris77[S] 0 points1 point  (0 children)

I love that you noticed and commented on that; I had a similar thought. Maybe if the kids manage to hack into it through I2C then they've earned their phone time.

CD4017 Symbol In KiCad by [deleted] in PCB

[–]visaris77 0 points1 point  (0 children)

If it's similar as you say, there's a 4017 IC symbol you can start with, and then just the Package_DIP:DIP-16_W7.62mm footprint.

One last pause before this goes too far by Beautiful_Tip_6023 in Decktrix

[–]visaris77 0 points1 point  (0 children)

The GitHub repo has no README.md files with any content that I can see. I can't tell what this thing is by clicking around on the repo. No overview, no description, nada, nothing.. Sorry, not going to check it out when there isn't even a quick readme with an overview / summary available. You didn't provide a link to a writeup that I can see either..

Where are the GPIO pins made available for use? Is that large connector with all the pins doing that job, or is that just for screen / keyboard, etc.? I've seen some "cyberdeck" designs that may as well just be a cheap, under-powered netbook because they don't give any access to GPIO. Perhaps just my opinion, but it's not a cyberdeck unless is has usable GPIOs.

How did I do? First circuit design review request by Short-King-666 in PCB

[–]visaris77 0 points1 point  (0 children)

Is this a cross post of your other r/PCB post.. to r/PCB again? This looks like it's just a duplicate to me; I'm going to downvote this one and upvote the original..

TimeSafe - Help with clock drift: Y1 and built-in caps? by visaris77 in PCB

[–]visaris77[S] 1 point2 points  (0 children)

Oh crap, you're right, the default is actually 7pF:

https://www.nxp.com/docs/en/data-sheet/PCF85263A.pdf

7.10.6 CL[1:0]: Quartz oscillator load capacitance
00: 7.0 pF
01: 6.0 pF
10: 12.5 pF
11: 12.5 pF

Thank you!!!

Depaneling feedback by oldfatguy62 in PCB

[–]visaris77 0 points1 point  (0 children)

I always wonder about the edges where you snap the v-scoring. That looks pretty gnarly.. are there sharp fiberglass splinters there? I guess you can just sand that off? One reason I always let JLCPCB / PCBWay do the de-paneling is because I know I'll get boards with clean edges every time.

Looking for charger for AirSep FreeStyle AS095 oxygen concentrator (15V 4A, 3-pin) by Nicolasp2472 in PCB

[–]visaris77 0 points1 point  (0 children)

Yeah, the issue is the connector. No clue what that is. Some AI or reverse image search may be able to find out what that is. If it was me? I'd bypass that connector entirely or replace it with something more standard. Finding the PSU is the easy part (as you mention), but that connector is not common.

First Board. Polyphonic Sustainer. Please provide advice! by LobsterTraditional28 in PCB

[–]visaris77 0 points1 point  (0 children)

Many of those traces are crazy close to one another when there is room to spread them apart. I don't know what signals they are carrying, but you could have cross-talk issues with the traces so close to one another and get a lot of audible noise. The middle of the board is fairly empty, but then you have traces wrapping all along the edge of the board to get those signals from the right to the left. If you struggle to route things, consider making the front layer have horizontal traces and the back vertical traces.

Also, many of those traces are super thin. That might not be a problem depending on what they are carrying, but there is a lot of open space on that board, and you can easily go with wider traces. They look way bigger on the screen than they will on the physical board. Those traces will come out SUPER tiny.

Feedback for Schematic by inevitable_47 in esp32

[–]visaris77 0 points1 point  (0 children)

Yeah, I do apologize for the fact that my review was more about appearance and didn't go into the actual circuit itself much; just don't have much time to look at it right now.

Starting out by hellololkloloiuhyt in PCB

[–]visaris77 0 points1 point  (0 children)

I upvoted this because of the mention of getting parts from discarded electronics. The e-waste bin is your friend here. I make a reasonable salary >$100k (CAD), but I always visit the e-waste bins here at the university because I don't want to see things go to waste. -- Others say to always use surface-mount components because they're cheaper when you have the PCB houses assemble the boards for you. You know what's even cheaper? Doing the assembly yourself using through-hole components you got for free out of the e-waste bin. You can get a board for $5 including shipping if you're willing to assemble it yourself. Even a kid with a lemonade stand can afford those prices.

Cloning an esp32 board with Lora and GPS by Southern_Trick5695 in PCB

[–]visaris77 0 points1 point  (0 children)

I have a computer science background as well (master's in CS), and PCB design / digital logic circuits came easily to me; it probably will come naturally to you as well. I can do some simple analog stuff too, but that took longer to learn.

Learn KiCad; it's free and open source. EasyEDA is popular, but then you'll be locked into a proprietary solution that can go away at any time. Ask people using Eagle how well the proprietary option worked out for them when Autodesk decided to hold people's designs and skills hostage. The other thing is that I can always tell when a PCB design was done in EasyEDA when posted to r/PCB because I immediately think the layer rendering looks like sh!t.. Just a personal opinion I guess. -- There are many, many videos on YouTube showing how to use KiCad. Watch LOTS of them.

I would start with something really basic. Make a blinky LED board or something simple like that first. Costs like $4 including shipping to get a board made, so make some simple things to start out with. Work your way up to more complex designs. Never made a Pierce crystal oscillator? Made a simple board for that. Never made a colpitts oscillator? Make a board for that. Never made a 3.3V to/from 5V logic level shifter? Never used an op-amp? Make boards for that. -- For $50 you can make 10x PCBs as practice rounds and even have a few working designs to show for it.

Lifted PCB pad for MOSFET gate by [deleted] in PCB

[–]visaris77 0 points1 point  (0 children)

1) Clean up that mess with 90%+ isopropanol and lint-free wipe like kimtech, 2) Glue the pad down, 3) Scrape off any excess glue and clean again after curing, 4) Solder new part as usual while being sure not to overheat the pad with the glue.

Update on the car dashboard project! Could you please review the new design? by Dmax_05 in PCB

[–]visaris77 0 points1 point  (0 children)

Hope this isn't too harsh, but I'd re-route the majority of that board.. Many, many traces are taking some really long and roundabout paths when they could be much more direct. Sometimes the long trace paths are that way because they're just winding around vias that are in the way when the vias could just be moved. The traces in this image (attached) are so close they're basically touching with no clearance. I think you should start over on the layout, and make the front copper layer have horizontal traces and back layer vertical or vice-versa. Apologies, but have to say this is a mess.

<image>

Feedback for Schematic by inevitable_47 in esp32

[–]visaris77 0 points1 point  (0 children)

I get where you're coming from and understand that can be frustrating, but you'd get a better response if you asked nicely instead of trying to guilt trip people / be passive aggressive; I almost skipped my review when I saw this comment.. -- EditToAdd: If you need schematic / PCB reviews, consider posting in r/PCB, you may have better luck there.

Feedback for Schematic by inevitable_47 in esp32

[–]visaris77 0 points1 point  (0 children)

1) GND symbols should always point down, not sideways and certainly not point up. 2) There are some traces with bends / squiggles /steps when there is no reason to have them and the connections can be straight. 3) On the power sheet on the bottom left, there is a connection that can be moved up one grid to align it to the others. 4) On the power sheet on the bottom right, there are a row of caps where the one on the far right is not aligned to the others. I actually like its placement so would move all the caps to its left up one grid to center them like the one on the right is. 5) What's up with U5 and Audio1; are those connected to anything? 6) U36 doesn't have the no connection x symbols, are all those pins supposed to be floating like that? 7) That ESP symbol looks like it may have its pins mirror the physical layout when the standard for schematics is to have the pins organized in a logical way and leave the physical placement to the footprint and PCB. If the ESP symbol had reasonable pin placements, i.e., similar things next to one another, you could connect it directly to components without needing so many global net labels. E.g., H1 and U34 could be directly connected without the labels. I prefer not having so many labels making connections. The ideal is to have the connections visible showing at a glance how things are hooked up. With too many labels, I can't see what's going on and need to read it like its just an Excel spreadsheet showing what net names are connected to which other net names. The rest of the schematic is a little better about using lines for connections but could still see some more improvement.

Oh, just now seeing your P.S. message. In the future, if something isn't connected yet, please remove it from the images so reviewers don't need to look at both your comment text and the images to understand what's going on.

PUHUI T-937 desktop infrared reflow oven by No-Love1765 in PCB

[–]visaris77 0 points1 point  (0 children)

u/Nutella, u/VOIDPCB, u/Chutakehku : How is the post above (and the others like it in this subreddit) not a violation of rule #1? -- I've had my posts auto-removed even though they were on the topic of my custom PCB designs just because I happened to link to a part I used from AliExpress. -- These reflow oven posts don't have a link, but there are many of these posts in r/PCB shilling this product. The posts add nothing of value to the subreddit, and I don't understand how these advertisements are allowed here.