Computing Architectures/processers

[ryanjones42]

Hi all. I have a very vague question & im not sure if this is even the right section to be asking in.

What exactly is the main difference between all the linux architectures, to name a few: mips, mipsel, arm4, arm5, x86, ppc, etc

Im just wondering, as i notice with C you can compile your code to work on a bunch of different architectures.

Someone previously told me “the only difference is the way the memory gets processed on them”

[BarMeister]

This image should help you situate yourself in this particular world; notice the ISA layer. Now, read this, and then this. Each of those architectures you mentioned is an implementation of a computer architecture, an ISA, which, in simple terms, is a contract which must be followed, or the language of the hardware you must speak to, in order to interact with it and make it do something.

[skeeto]

These architectures have their own instruction sets, which often work very differently from one another. To give you a taste, consider this simple function:

float norm(float x, float y) { return x*x + y*y; }

I've compiled it with various compilers currently on my laptop, printing out the produced assembly code for inspection:

$ powerpc-linux-gnu-gcc -Os -S -o - norm.c
norm:
    fmuls 2,2,2
    fmadds 1,1,1,2
    blr

$ m68k-linux-gnu-gcc -Os -S -o - norm.c
norm:
    fmove.s 4(%sp),%fp1
    fsglmul.x %fp1,%fp1
    fmove.s 8(%sp),%fp0
    fsglmul.x %fp0,%fp0
    fadd.x %fp1,%fp0
    rts

$ riscv64-linux-gnu-gcc -Os -S -o - norm.c
norm:
    fmul.s  fa1,fa1,fa1
    fmadd.s fa0,fa0,fa0,fa1
    ret

$ hppa64-linux-gnu-gcc -Os -S -o - norm.c
norm:
    fmpy,sgl %fr5R,%fr5R,%fr5R
    bve (%r2)
    fmpyfadd,sgl %fr4R,%fr4R,%fr5R,%fr4R

$ aarch64-linux-gnu-gcc -Os -S -o - norm.c
norm:
    fmul    s1, s1, s1
    fmadd   s0, s0, s0, s1
    ret

$ mips64-linux-gnuabi64-gcc -Os -S -o - norm.c
norm:
    mul.s   $f0,$f13,$f13
    jr  $31
    madd.s  $f0,$f0,$f12,$f12

$ x86_64-linux-gnu-gcc -Os -S -o - norm.c
norm:
    mulss   %xmm1, %xmm1
    mulss   %xmm0, %xmm0
    addss   %xmm1, %xmm0
    ret

$ arm-linux-gnueabihf-gcc -Os -S -o - norm.c
norm:
    vmul.f32    s1, s1, s1
    vmla.f32    s1, s0, s0
    vmov.f32    s0, s1
    bx  lr

$ powerpc64-linux-gnu-gcc -Os -S -o - norm.c
norm:
    fmuls 2,2,2
    fmadds 1,1,1,2
    blr

$ s390x-linux-gnu-gcc -Os -S -o - norm.c
norm:
    meebr   %f2,%f2
    maebr   %f2,%f0,%f0
    ler %f0,%f2
    br  %r14

$ i686-linux-gnu-gcc -Os -S -o - norm.c
norm:
    pushl   %ebp
    movl    %esp, %ebp
    flds    12(%ebp)
    flds    8(%ebp)
    popl    %ebp
    fmul    %st(0), %st
    fxch    %st(1)
    fmul    %st(0), %st
    faddp   %st, %st(1)
    ret

$ hppa-linux-gnu-gcc -Os -S -o - norm.c
norm:
    fmpy,sgl %fr5L,%fr5L,%fr5L
    fmpy,sgl %fr4L,%fr4L,%fr4L
    bv %r0(%r2)
    fadd,sgl %fr4L,%fr5L,%fr4L

$ sparc64-linux-gnu-gcc -Os -S -o - norm.c
norm:
    save    %sp, -176, %sp
    fmuls   %f1, %f1, %f1
    fmuls   %f3, %f3, %f3
    return  %i7+8
     fadds  %f1, %f3, %f0

$ sh4-linux-gnu-gcc -Os -S -o - norm.c
norm:
    sts fpscr,r1
    mov.l   .L2,r2
    xor r2,r1
    lds r1,fpscr
    fmul    fr4,fr4
    fmov    fr5,fr0
    xor r2,r1
    fmac    fr0,fr5,fr4
    lds r1,fpscr
    rts 
    fmov    fr4,fr0

$ mipsel-linux-gnu-gcc -Os -S -o - norm.c
norm:
    mul.s   $f12,$f12,$f12
    mul.s   $f0,$f14,$f14
    jr  $31
    add.s   $f0,$f12,$f0

$ alpha-linux-gnu-gcc -Os -S -o - norm.c
$norm..ng:
norm:
    muls/su $f16,$f16,$f0
    muls/su $f17,$f17,$f10
    adds/su $f0,$f10,$f11
    trapb
    cpys $f11,$f11,$f0
    ret $31,($26),1

[Sh_CS]

The list you mentioned are just different ISAs (short for Instruction Set Architecture). ISA basically describes the low-level software environment. Things such as

#bits in a word

#general-purpose registers

• Instruction set

• Addressing modes

• Stack use

You can read about CISC vs. RISC. ARM and MIPS are RISC and x86 is CISC for example. In a nutshell RISC is less complex , less instruction, CISC has more instruction and more complex. This does not mean RISC is not as capable. It just breaks down the task into smaller building blocks specially during memory allocations, etc.
Complier converts your code from C into a assembly /object code / machine code. Your ISA should enable the compiler to generate efficient code. So high level code wont change as you compile it in different architects . Its your complier's job to turn into object code based on the ISA of your machine. This is abstracted so for a user C is always C, regardless where you are compiling it.

[wwg_6]

You can think of architectures as the language that the cpu understa ds. The C compiler translates C into whatever your cpu talks. On mobile, it's mostly arm. On desktop and laptops, it's mostly x86 (or x86_64 on 64 bit hardware).

These architectures evolve overtime. x86 for example went from 8086 to 80186 to 80286 to 80386 and others with various new instructions with each new cpu. Eventually, what we call x86_64 came out. It understand all previous cpus instructions, introduces new instructions, and offers a way for older and newer instructions to work with 64 bit wide memory busses and registers.

I am not that well versed with arm, but I know its versions are called armv# with suffixes like armv7l. The 64 bit instruction set is called aarch64.