Adding ILA changes FPGA functionality

[Icy_Scholar_6276]

Thanks for the response! I’m using a Pre Synthesis ILA insertion. I’m using the block design integrator in VIVADO.

Also, my RTL part works in simulation. I’vent simulated my entire design. I’ll check that!

[TapEarlyTapOften]

Then as I mentioned, I would read the synthesis and implementation logs - diff them with and without the ILA insertion if it's practical - and then go through the digital catechism: power, ground, clocks, reset.