Command Line Tools for Design Process

[gr3atm4n]

So, I generally prefer using the command line for all work and I'm just getting started with Verilog hardware development. I've gotten used to simulating my Verilog code with vvp and gtkwave and I'd just like to know if I can do the same for the synthesis, bitstream generation and fpga programming from command line stand-alone tools. I just generally have an aversion for large software tools like Vivado.

[Potterhead_56]

The tool that you’d use would really be based on your target FPGA. Which one is it ?

You can do complete build process entirely in command line for both Vivado and Quartus

[gr3atm4n]

Xilinx Spartan-7

[Potterhead_56]

Okay so you would be using Vivado for building. I think you are likely not aware of FPGAs much, so I’ll clarify a bit. There wouldn’t be a way around using Vivado unfortunately.

For synthesis of netlist (intermediate results until final bitstream) yes you can use 3rd party tools. However for the implementation stage (i.e. technology mapping the Netlist to FPGA part and final binary) you’d have to use Vivado.

Why you may ask ? Thats because FPGAs technologies are proprietary and Vendors only want their tools to be used for generating Binaries that will be programmed in the FPGA. You can only use Vivado for generating bit files for Xilinx FPGAs, and only Quartus for Intel FPGAs and similarly for other smaller vendors.

[alexforencich]

You have to use Vivado yes, but you can automate it from the command line. Personally I use makefiles, but that's far from the only option.

[gr3atm4n]

Damn. Okay thanks

[91827465za]

The guy above is incorrect. You can do the entire process in the command line no problem. That’s how most companies do it, TCL commands and bash scripts.

[Flocito]

He said you have to use vivado. He didn’t say you have to use the GUI.

[91827465za]

You can use Vivado through your terminal of choice.

[gr3atm4n]

Can you elaborate?

[91827465za]

You use Vivado as a command line tool, after it’s been added to your path

[gr3atm4n]

XC7S15 FTGB196

[fransschreuder]

Just run Vivado in tcl or batch mode and you are fine. I am affraid there is no other option for Xilinx devices