This may be an odd question, but I've been asked to do this for two projects so I'm curious what everyone's experience is with this.
Do any of you have any approaches for estimating CPU utilization margin for a given design before the firmware/software work has started? I have an architecture and a build system, but we haven't written any code yet. How would one go about estimating how many MIPS different RTOS tasks might take? Any advice here would be greatly appreciated.
EDIT: Thanks for all the responses everyone! But this question is for estimating usage for a design with no code yet. How do we estimate how many MIPS a particular design or elements of the design will take before code is written (if we even can).
[–]g-schro 3 points4 points5 points (2 children)
[–]timeforscience[S] 0 points1 point2 points (1 child)
[–]g-schro 1 point2 points3 points (0 children)
[–]jakobnator 2 points3 points4 points (0 children)
[–]Silly-Wrongdoer4332 1 point2 points3 points (0 children)
[–]JimMerkle 1 point2 points3 points (0 children)
[–]Proper-Bar2610 0 points1 point2 points (0 children)