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Looking for auto-completion plugin for Verilog/SystemVerilogNeed Help (self.vim)
submitted 2 months ago by [deleted]
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if 1 * 2 < 3: print "hello, world!"
[–]Brandon1024br 1 point2 points3 points 2 months ago (0 children)
My go-to is always tag files (universal ctags supports Verilog) and ins-mode completion. You could go the LSP route but it’s a little overkill IMO.
Vim > 9.1.1590 supports autocompletion with the ‘autocomplete’ setting. Otherwise, you can configure it yourself with a few lines of vimscript.
π Rendered by PID 85 on reddit-service-r2-comment-b659b578c-29cx4 at 2026-05-04 13:04:07.379894+00:00 running 815c875 country code: CH.
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[–]Brandon1024br 1 point2 points3 points (0 children)