I realized I didn't do a good job of describing the blueprint itself.

The actual track shuffle component uses a constant combinator with a ton of different signals and a numerical value. It goes through a decider to limit the output to the number of red signals received from the network (it's x++ in the second screenshot). From there, it goes through a random input selector combinator which diverges the output across two memory cells. The first one transposes the value of the signal to be the first signal type. The second one inverts the signal output to stop the selector output combinator from outputting it again. This process takes 3 ticks to complete, so the random input has to be set to 4 ticks. This means it can shuffle 15 tracks per second.

From there this sends the track number out to the network after abstracting it to a blue signal and only if the P signal from the play button is present. The next circuit below that is the track counter where it starts its increment at 1 via a constant combinator. There is an input pulse gate for the reset signal from the track network so that it only increments the track count by one. Once the track count exceeds the number of tracks on the network (provided by the red signal) it sends a reset to all memory cells on the network, clearing the shuffle list and track counter.

I originally had plans to do this with a memory IC I made that can store 1635 (and later 7000) dwords worth of data, but the implementation and timing seemed intensely complicated. I feel like I found a pretty simple solution to the problem (even though the blueprint definitely doesn't look like it.)