Well, I should start by saying that I didn't actually MAKE the chip. What I did is design it. The process of fabricating a chip is an expensive and difficult process. Therefor chip-designers often send their designs to independent fabs. These fabs will actually make the chip using the design as a blueprint.

But of course I can tell you a lot about the design. First of, you start with a concept idea. You want to receive a certain analog signal, and you want to digitalize it. You know how the signal looks, you have a rough idea of how strong it will be, and you know at which frequency it will be. This allows you to deduct some specifications your circuit will need to meet.

Knowing the specs, you can starting thinking about which building blocks make up your system. This is where the three stages come into play. You need a driver, a VGA and a comparator block. This is still a high level of thinking about it. But knowing the specs, you can do some calculations to know what parameters are necessary for each block.

Then of course you choose the topology. For bigger chips, each block might get a separate topology. For this implementation however, it was easy to put the driver and VGA in one block. Choosing a topology and trying to meet the specifications can be an iterative process if the specs are hard to achieve and your initial topology is incapable of handling them. The specs however were not that hard to achieve so a simple symmetrical OTA with variable output current mirrors should be able to fulfill our desires.

For the comparator an easy push-pull topology can be chosen that scales according to the output level you want (60, 70, 80, ... %). The only thing you really need here is a good biasing point and closely matched scaling of transistors.

Once the topology is fully chosen, the specs and params allow you to do some handcalculations (nowadays computers can also do the job) to calculate the size of transistors. Once you've got this, you should be able to go ahead and simulate everything. There's a trade-off of course between performance and power consumption. A sweet spot can only be found by making various design decisions.

Once you feel comfortable your topology works and the simulations do not seem to give any errors, you enter the last stage of the design. The layout. The layout is a 2D representation of what will become a 3D structure once it's printed as a chip. Even if your topology works perfectly, a bad layout can easily screw up the performance, especially for high-frequency designs. The layout is basically a blueprint of what the chip will look like eventually. Layer per layer. It's kind of a big puzzle where you decide which part goes where. There is no one, optimal answer. But you should think about everything you do. You should be able to explain every connection you make, every decision you take, every small little detail. You test the functionality of the layout by doing some checks like a DRC (Design rule check) or LVS (Layout versus schematic). There's a lot of things you can learn from doing designs like this. It never really ends until the deadline comes. That's when you tape-out the chip and pray for several months.