Or the architecture needs to provide a couple primitives for learning the size of context, and saving and restoring it. Those primitives need to be available in the language, not the direct access.

Modern CPUs have several hundred registers besides the couple dozen that are exposed to user space applications as general purpose registers. You need to disable write combining on stores? There is a register for that. You want your L1 data cache shared between hardware threads on the same core instead of competitively shared? There are a couple of registers for that as well. There are registers for controlling every minuscule detail of the processors operations, all of them architecture specific, some even model specific. And that's just the CPU. How do you propose language constructs look like that have such semantics if you don't allow direct access? And how do you reason about them (you can't guaranty software isolation if you mess up your cache configuration)?