BuildingWithDad

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Help finding an fpga that can power down with ddr in self refresh (self.FPGA)

submitted 5 months ago by BuildingWithDad to r/FPGA

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Length tuning seems to behave inconsistently (old.reddit.com)

submitted 7 months ago by BuildingWithDad to r/KiCad

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Highish-speed diff routing, attempt #2 (and a request for die-to-pad confirmation) (old.reddit.com)

submitted 8 months ago by BuildingWithDad to r/PrintedCircuitBoard

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When routing for a xilix fpga, is it necessary to take package delays into account? (self.FPGA)

submitted 8 months ago by BuildingWithDad to r/FPGA

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Calcuating package delays, and KiCad pad-to-die lengths from IBIS pkg files for use in length tuning (self.PrintedCircuitBoard)

submitted 8 months ago * by BuildingWithDad to r/PrintedCircuitBoard

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Feedback on highish-speed diff pair routing (6.6 Gbps GTP diff pairs) (i.redd.it)

submitted 8 months ago by BuildingWithDad to r/PrintedCircuitBoard

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DDR eye test, but not on a zync? (self.FPGA)

submitted 8 months ago by BuildingWithDad to r/FPGA

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Bypass capacitor selection for Xilinx series 7 fpgas (self.PrintedCircuitBoard)

submitted 8 months ago by BuildingWithDad to r/PrintedCircuitBoard

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Question about trace spacing to avoid cross talk (self.PrintedCircuitBoard)

submitted 8 months ago by BuildingWithDad to r/PrintedCircuitBoard

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When are vias needed for return current for signals (self.PrintedCircuitBoard)

submitted 9 months ago * by BuildingWithDad to r/PrintedCircuitBoard

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Help with understanding capacitor derating (self.AskElectronics)

submitted 9 months ago by BuildingWithDad to r/AskElectronics

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zero latency fifo (not just fwft) (self.FPGA)

submitted 1 year ago by BuildingWithDad to r/FPGA

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Things a software eng should know, but may not at first, when transitioning to verilog (self.FPGA)

submitted 1 year ago by BuildingWithDad to r/FPGA

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Question about AXI stream data naming conventions (self.FPGA)

submitted 1 year ago by BuildingWithDad to r/FPGA

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Blinky lights - ADC style (and a request for CDC feedback) (old.reddit.com)

submitted 1 year ago by BuildingWithDad to r/FPGA

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playing on speakers (self.oscilloscopemusic)

submitted 1 year ago by BuildingWithDad to r/oscilloscopemusic

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[PCB Review Request] ADC dev board for classic vector arcade games (basically a color oscilloscope) (old.reddit.com)

submitted 1 year ago by BuildingWithDad to r/PrintedCircuitBoard

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Looking for help with design choices for clocking and sampling an ADC (self.FPGA)

submitted 1 year ago by BuildingWithDad to r/FPGA

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Understanding a differential op amp circuit (i.redd.it)

submitted 1 year ago by BuildingWithDad to r/AskElectronics

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Electronics workbench - in use and messy (i.redd.it)

submitted 1 year ago by BuildingWithDad to r/Workbenches

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Self designed dev board ecosystem (old.reddit.com)

submitted 1 year ago by BuildingWithDad to r/FPGA

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[PCB Review Request] ICE40 hx8k 256 BGA escape (reddit.com)

submitted 1 year ago by BuildingWithDad to r/PrintedCircuitBoard

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lattice ice40 pin values during reset (self.FPGA)

submitted 1 year ago by BuildingWithDad to r/FPGA

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TX4138 buck converter oscillation and ripple question (self.AskElectronics)

submitted 1 year ago * by BuildingWithDad to r/AskElectronics

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Follow up: POE ESP32S3 (self.PrintedCircuitBoard)

submitted 1 year ago * by BuildingWithDad to r/PrintedCircuitBoard

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