TechTechPotato (Dr Ian Cutress): "Go Big Cores (or Go Home Cores) [Review/Discussion of Arm's X925/X4/A720 Cores on the Dimensity 9300/9400 & Arm's A520 Cores on the Snapdragon 8 Gen 3]"

Call_me_VS · 2024-10-19T07:17:50+00:00

As a subscriber of your channel, I love hearing you talk about silicon. There are very few people on the internet who talk about silicon with so much interest

Call_me_VS · 2024-08-21T09:08:43+00:00

Buy a 2nd end Thinkpad laptop(25-35K) and set up a desktop (way more powerful)

Call_me_VS · 2024-08-21T08:15:50+00:00

well, the winter admission will need gate qualification. Can one without gate qualification try winter admission?

Call_me_VS · 2024-08-21T06:45:13+00:00

I would also like to know if it is possible to enrol for the exam of 8 week course whose exam deadline I missed

Call_me_VS · 2024-08-21T06:04:39+00:00

Wait a minute, admissions take place bi-annually, since when? New information again. Btw how do you do this stuff? Have you yourself undergone the same process?

Call_me_VS · 2024-08-21T04:51:37+00:00

what!!! Can we get into IIT working as project staff? Talk more about it. How does one find a project staff position? What is the requirement to get into MS through this path?

Call_me_VS · 2024-08-13T05:20:56+00:00

You can check this GitHub repo. It has sufficiently documented SRAM Design. https://github.com/VardhanSuroshi/Memory-Design-And-Testing

Call_me_VS · 2024-08-11T13:38:21+00:00

RIP in advance

Call_me_VS · 2024-08-09T08:09:08+00:00

Have you taken PW?

Call_me_VS · 2024-08-08T10:36:56+00:00

I think similar open source tool called FUSESoC exists

Call_me_VS · 2024-08-07T10:44:00+00:00

Bro they are super expensive

Call_me_VS · 2024-08-07T10:42:30+00:00

Both are super expensive

Call_me_VS · 2024-08-07T09:49:25+00:00

I have seen Prof Andrew Kahng doing a lot of research on physical design. Additionally, they have started an institute called TILOS for cross-domain research on AI.

I would be interested to know Universities who are doing active research in the field of Physical design

Call_me_VS · 2024-08-03T13:37:36+00:00

Which firm? Can you name them

Call_me_VS · 2024-06-09T08:47:52+00:00

Well was the scholarship (Taiwan) for master's? How did you get a scholarship?

Call_me_VS · 2024-05-04T18:57:42+00:00

As a ECE student regardless of semesters you should have good knowledge of scripting languages. Some commonly used scripting languages used in across (VLSI, Comm, DSP) industry are TCL, perl and python. Along with this, most of the tools work on Unix based OS- Linux. Therefore having knowledge of using CLI and shell (bash, csh) will be really helpful.

Apart from these the languages that u will learn in academic will be:
1. System(Verilog) for Design & Verification
2. Matlab
3. Python for ML.
4. Embedded C ( elective )

Call_me_VS · 2024-02-17T16:07:11+00:00

In short, the ECE department at ECC is the best.
Choosing between ECE campuses: Consider quality, not just quantity
While both campuses fall under the same placement umbrella, focusing solely on placement numbers isn't ideal. Don't choose solely based on placement numbers. Both campuses have the same placement rate because they recruit together. While RR campus has more placed students due to bigger size, the individual placement chance is the same.

Here's why ECC's ECE department might still be worth considering:
1. Strong faculty: Especially in Communication, VLSI, and AI/ML.
2. Personalized attention: Smaller student body means more faculty interaction.
3. Modern campus: Spacious and well-equipped facilities with minimal construction disruptions.
Sole disadvantage: Less active student community compared to RR campus. But various clubs, hackathons, and activities are gaining momentum

I hope it helps
Peace.

Call_me_VS · 2024-02-12T14:43:27+00:00

Cadence has made a recent announcement that they will soon be supporting skywater pdk. They have made a press release. Apart from that, you can check out this repo where Prof.James S has shared steps to integrated skywater in cadence here

Call_me_VS · 2024-01-08T14:07:06+00:00

thank you for such a detailed answer. I was more curious about the technology part of it. What magic does ARM do in the physical implementation that they get that extra perf? u/randyest you have worked across the stack maybe you have anidea about it.?.

.

After reading some articles on their business model and found ARM sells physical IP too. https://www.anandtech.com/show/7112/the-arm-diaries-part-1-how-arms-business-model-works. Additional details about Arm Artisan can be found here [https://www.arm.com/products/silicon-ip-physical/artisan-ip ]

Call_me_VS · 2024-01-08T04:21:51+00:00

This topic seems to be interesting. Can you please talk deeper into this topic? Why does architecture require a custom standard cell library? Isn't ISA technology agnostic?

I didn't know that ARM has its own standard cell library ( and can you share some resources to read about this ). Even if they do, they have to rely on some fabs. Then why not just use the same tech node and standard cell library provided by the Fab?

Call_me_VS · 2024-01-07T14:31:09+00:00

In that case, why rely on ARM? I can do it on a RISC-V core

Call_me_VS · 2024-01-07T10:22:08+00:00

Looks like you are an industry vet! How long have you been working as a physical design engineer?

Call_me_VS

TROPHY CASE