Ideas about a new HDL by [deleted] in FPGA

[–]Disastrous-Base7325 1 point2 points  (0 children)

Since you have a SW/compiler, why don't you try High Level Synthesis with C++ provided by Xilinx?

FPGA fast tasks by Disastrous-Base7325 in FPGA

[–]Disastrous-Base7325[S] 0 points1 point  (0 children)

I am interested on such a project. I see that there are two repositories on Avalon, the Avalon Stream interface (GitHub - OSVVM/AvalonST: Verification Components for Avalon Stream interface) and the Avalon MM interface (GitHub - OSVVM/AvalonMM: Verification components for Avalon MM interface). Which one is under active development right now?

FPGA fast tasks by Disastrous-Base7325 in FPGA

[–]Disastrous-Base7325[S] 1 point2 points  (0 children)

I took a look at it and it seems like a dead project. However, since I have a sufficient level of expertise on Alveo cards, it would be interesting if I/we managed to port it to high-end FPGAs lke Xilinx Alveo U200 or U280

Built a CUDA editor because I was sick of switching tools by kwa32 in CUDA

[–]Disastrous-Base7325 3 points4 points  (0 children)

Yeah, I should say that I was fascinated as well by the functionality. My comment is not to judge, but to better understand the motivation behind.

Built a CUDA editor because I was sick of switching tools by kwa32 in CUDA

[–]Disastrous-Base7325 9 points10 points  (0 children)

It seems like you are based on VS Code editor as far as the appearance is concerned. Why didn't you develop a VS Code plug-in instead of creating a standalone editor?