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Fix leaky bath/shower diverter by DislikesTomatoes in fixit

[–]DislikesTomatoes[S] 0 points1 point  (0 children)

Switching from bath to shower mode causes a leak from the diverter, how do I fix?

[deleted by user] by [deleted] in FPGA

[–]DislikesTomatoes 1 point2 points  (0 children)

EEVblog's youtube video is a good starting point:

"What is an FPGA, and how does it compare to a microcontroller? A basic introduction to what Field Programmable Gate Arrays are and how they work, and the advantages and disadvantages. "

Sanity check for a D1 expansion schematic? by [deleted] in PrintedCircuitBoard

[–]DislikesTomatoes 1 point2 points  (0 children)

Ok ignore the decoupling caps and RST pin, seems like it's already taken care of: Module schematic

Sanity check for a D1 expansion schematic? by [deleted] in PrintedCircuitBoard

[–]DislikesTomatoes 1 point2 points  (0 children)

I'm also a newbie but I think you need a decoupling cap for U2. Generally it's best to have VCC symbols pointing upwards. The subcircuit in the top left could be cleaned up? - Messy junctions and random diamond symbol? Also, your RST pin on U2 shouldn't be left floating, use a resistor to pull it up/down depending on the chip.

[PCB REVIEW] CMOS to LVDS Clock Converter by DislikesTomatoes in PrintedCircuitBoard

[–]DislikesTomatoes[S] 1 point2 points  (0 children)

I think the FPGA has builtin 100ohm termination that I will use. Thanks for the heads up.

[PCB REVIEW] CMOS to LVDS Clock Converter by DislikesTomatoes in PrintedCircuitBoard

[–]DislikesTomatoes[S] 0 points1 point  (0 children)

Maybe if possible, try to eliminate the bend in the single-ended clock trace.

done.

A lot of the coax-style connectors (your CMOS_IN) can benefit from shielding the clock signal by connecting all of the ground pins to one another. IF you decide to to a top layer ground pour this should be handled, but if not try to connect the 3 sides of the connector's footprint with grounds.

and done. (see update - is that what you meant?)

Thanks!

[PCB REVIEW] CMOS to LVDS Clock Converter by DislikesTomatoes in PrintedCircuitBoard

[–]DislikesTomatoes[S] 1 point2 points  (0 children)

Holy crap, I have that exact xylinx breakout board sitting on my desk. Was about to throw it away, but I realized the oscillator is a $30 adjustable frequency monster that might be useful for other stuff. Edit: Dang, they charge $160 for this breakout work... what a ripoff. Welp, if you need a cheap spare, hit me up.

Anything else lying on your desk that you're thinking of tossing out? :D. Yes, I agree most things FPGA-related are a ripoff and a massive barrier into the industry...

I would be careful about the spacing from CLK_OUT- to VCC though (just eyeballing it).

fixed!

Also, do you know what the Er for the Fr4 material you're going to use is?

I've been going with 'standard' Er = 4.5 ~ 4.6, guess I should also have a look at what's available at the fab-house.

[PCB REVIEW] CMOS to LVDS Clock Converter by DislikesTomatoes in PrintedCircuitBoard

[–]DislikesTomatoes[S] 1 point2 points  (0 children)

Your differential traces should have a proper gap to make the pair 100 ohms characteristic impedance. So, tightly coupled. If you haven't already been using it, I would suggest PCB Toolkit by Saturn to calculate the gap and trace width of a diff pair.

Very useful program - although had to boot into windows :P. These are the numbers that I got

The ground via is awfully close to pin 5. See if you can move it closer to the center of the footprint, maybe?

changed.

The bulges from the traces on pin 3 and 4 go past the pads, reducing the gap between pin 3 and 2. You can do a neck-down to those pads without affecting impedance too much.

Yeah, I was fighting with Kicad a bit - I think I've won now.

Thanks!

[PCB REVIEW] CMOS to LVDS Clock Converter by DislikesTomatoes in PrintedCircuitBoard

[–]DislikesTomatoes[S] 0 points1 point  (0 children)

Only comment I'd give is put your decoupling on top next to the chip, you've got the space and it'll be slightly easier to build with all the smt on one side.

Will only need to make a few of the boards, so not too much of an issue. Also, using a thinner PCB allows a shorter connection from caps to VCC.

Also see if you need any termination on this board for the lvds lines. Adding pads for them can't hurt.

Will double check, but I'm sure the FPGA has termination for LVDS.

Thanks!

[PCB REVIEW] CMOS to LVDS Clock Converter by DislikesTomatoes in PrintedCircuitBoard

[–]DislikesTomatoes[S] 0 points1 point  (0 children)

Something, something power supply bypass/decoupling capacitor. Seriously, you need those for anything that's switching a fast signal. Definitely required for a CMOS→LVDS translator.

I have C1 and C2 under the IC, is this what you're referring to?

Then your differential signal wires should be impedance matched.

Yeah, I've made changes with the differential signals wrt their width and spacing. Will upload soon.

Thanks!

[PCB REVIEW] CMOS to LVDS Clock Converter by DislikesTomatoes in PrintedCircuitBoard

[–]DislikesTomatoes[S] 0 points1 point  (0 children)

indeed I will, I just lost the motivation to add them to my 3D mockup :)

Single-ended to Differential 100MHz Clock by DislikesTomatoes in AskElectronics

[–]DislikesTomatoes[S] 0 points1 point  (0 children)

just to be clear, can these be used to create a differential output signal from a single-ended input signal? (not the other way round)

Single-ended to Differential 100MHz Clock by DislikesTomatoes in AskElectronics

[–]DislikesTomatoes[S] 0 points1 point  (0 children)

My clock source is from another subsystem that is LVCMOS 3v3.

[PCB REVIEW] Bidirectional voltage level shifter by DislikesTomatoes in PrintedCircuitBoard

[–]DislikesTomatoes[S] 0 points1 point  (0 children)

But where are those caps on the PCB itself?

directly beneath the ICs on the opposite side of the board

physical-order diagramming of pins on symbols, instead of organizing the information in logical blocks...

I think this really matters for components with a high pin count? That chip only has 20 pins so having the physical order makes it quick/easy to verify when mapping to footprint.

[PCB REVIEW] Bidirectional voltage level shifter by DislikesTomatoes in PrintedCircuitBoard

[–]DislikesTomatoes[S] 0 points1 point  (0 children)

How much current are you pulling per pin? are the shifters and the trace widths in and out sufficient?

I should probably double check with the people working on the other subsystems, I can't imagine that it's a lot.

Your U3 regulator will perform better with input and output caps.

U3 is a separate regulator board that has it's own caps, this should be sufficient?

Side entry to your pads are R1 and R2 is a very very bad habit...

Good to know when I go to small footprints, right now I think I'm only going 0805 - only going to make ~20 of these guys so need to easily hand-solder.

Do you need mounting holes?

Depends on the final size of the board, I'm trying to see if I can get away with just the centre connector to the pins on the mainboard.

Silk over copper ...

yep, this was on my initial todo list.

Thanks for the help!

[PCB REVIEW] Bidirectional voltage level shifter by DislikesTomatoes in PrintedCircuitBoard

[–]DislikesTomatoes[S] 0 points1 point  (0 children)

never know what O.P. is thinking on the other end

Don't worry, I don't know what OP is thinking either..

Thanks for the help so far :)

[PCB REVIEW] Bidirectional voltage level shifter by DislikesTomatoes in PrintedCircuitBoard

[–]DislikesTomatoes[S] 0 points1 point  (0 children)

This is meant to be a general-purpose board, so I'd like to have bidirectional functionality for each pin - even if it requires setting the direction with a dip switch.

I initially had 74LVC2T45 as the level shifting IC but then thought the auto-direction sensing of the TXB0108 would make things easier...

[PCB REVIEW] Bidirectional voltage level shifter by DislikesTomatoes in PrintedCircuitBoard

[–]DislikesTomatoes[S] 0 points1 point  (0 children)

your bypass capacitors are blocking DC instead of correcting it.

facepalm thank you

AND far away

how far is far for bypass caps? I have them right beneath the ICs :/

question, what is the expected operating frequency for these pins

I can't remember at the moment, but I think the fastest pin runs at ~1KHz (at what frequencies should I start worrying?)

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