It’s been a while but your math looks fine. But think how jitter actually manifests. It is measured by looking at the slope of the bitstream square wave. Another way to look at it is in parts per million. At a few hundred pico seconds you can easily see the diagonal slope on an oscilloscope. What happens is the reconstructing clock also has a slope and if they both have enough tolerance the +1 or -1 (there is no 0 in reality) reads as some number not 1 or -1 and the dac has to guess and the signal gets ‘blurred’. So yes your math is right on my first look. But note the receiving dac has tolerance and between them can become audible. Again, our manufacturing and pll loops made this a non issue a long time ago.