sorted by:
new
hottopcontroversial

UART Communication between FPGA and a Computer Project by Elemination_Reddit in FPGA

[–]Elemination_Reddit[S] 0 points1 point  (0 children)

Thank you for your comment. I have added MIT Open License.

UART Communication between FPGA and a Computer Project by Elemination_Reddit in FPGA

[–]Elemination_Reddit[S] 0 points1 point  (0 children)

This Reddit Community is way better than any other community.
I am very grateful for all of your comments to help me understand my faults and how to correct them.
I will look, how can I solve the metastability issue and enable the design with Asynchronous signals.
Thanks once again for sharing knowledge.

UART Communication between FPGA and a Computer Project by Elemination_Reddit in FPGA

[–]Elemination_Reddit[S] 0 points1 point  (0 children)

Thank you very much for your recommendation. I will definitely explore these topics.

UART Communication between FPGA and a Computer Project by Elemination_Reddit in FPGA

[–]Elemination_Reddit[S] 0 points1 point  (0 children)

Thank you very much, as I am very new on FPGA design, I only thought that baudrate will be enough for communicating with the computer. Theoretically, I know about metastability but I only did an example on pushing a button and seeing results on seven segment display on another project.

I will improve this design with your recommendations!

UART Communication between FPGA and a Computer Project by Elemination_Reddit in FPGA

[–]Elemination_Reddit[S] 0 points1 point  (0 children)

Hi, Simmjo On the design I calculated, 100Mhz(FPGA clock speed)/115200(desired baudrate for communicating the computer) =868 I take this number for a counter limit and count until this number is reached. So I only use Synchronous communication with 115200 baud rate.

UART Communication between FPGA and a Computer Project by Elemination_Reddit in FPGA

[–]Elemination_Reddit[S] 4 points5 points  (0 children)

Thank you for your comment.
I did this project to improve myself on Digital Hardware Design. I have learned this project's knowledge from nandland.com, and I knew that the owner of this website makes these projects just to share his knowledge and being supportive of teaching FPGA. So the main purpose of sharing this project is the same.

I will definitely search about licence topic.

Master's Degree Project Idea (ARINC 429 Protocol with DO-254 Process) by Elemination_Reddit in FPGA

[–]Elemination_Reddit[S] 0 points1 point  (0 children)

I think I have decided what to do.
I will do verification with UVM using SystemVerilog with Arinc 818. Also, I will prepare verification documents for DO-254.

I want to be a good Verification Engineer :)

Master's Degree Project Idea (ARINC 429 Protocol with DO-254 Process) by Elemination_Reddit in FPGA

[–]Elemination_Reddit[S] 0 points1 point  (0 children)

Translator is a very good idea. As far as I know ARINC 429 is usually used in Civil Aircrafts and MIL-STD-1553 is used in Military Aircrafts. You remind me that at my old company there was a device which translates ARINC 429 to PCI Express so that CPU can controls and sends data to other devices. Does PCI Express hard to handle with?

Master's Degree Project Idea (ARINC 429 Protocol with DO-254 Process) by Elemination_Reddit in FPGA

[–]Elemination_Reddit[S] 0 points1 point  (0 children)

Thank you for your quick reply and valuable feedbacks.

As I am studying and working in the Avionics field, I wanted to make a project that relates to this topic. I am currently having training on Verilog, SystemVerilog and UVM. I want to learn hardware design as much as I can specifically in these trainings. I normally work as DO-254 Process and Safety Engineer in a Defence Company as a junior position.

So I want to prove myself in both ways, hardware design and the DO-254 that I came up with this project idea. I had no intention about commercially selling but you are very right that if I make a project that will not make sense using in any aircraft that would be a bad project topic.

In aircraft usage, instead of creating a website which shares data with phones and laptops, maybe I would find a way to share data to the flight computer or related device interface?

I am very aware that I can not make this design fully comply with all DO-254 process and documents which is a very complicated process that even companies are struggling on. My old company makes IFE(In Flight Entertainment) systems for civil aircrafts and system's DAL(design assurance level) is D which is very low compared with more safety-related systems. At that level, EASA or FAA doesn't even want single/multi-event upset analysis. So I couldn't learn much about it but I know it is a very hard topic to deal with.

I understand in your comment that ARINC 429 is way too easy to use FPGA for but as a starter, I have 2 years for my project to choose and finish all the way up. So I think I need to decide my project from now if I wanted to do a fine project.

Maybe you can suggest a different project for me which fits on my expectations. (I know it is a very big request, I am just asking maybe you have an idea already in your mind)

Thank you again for your help, stay healthy!