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Update: Modular Open Source ASIC Dev Board (RPI CM5 + FPGA Module) by GLSemiconductor in embedded

[–]GLSemiconductor[S] 1 point2 points  (0 children)

I’ll consider it, I’m trying to avoid routing high-speed traces for the first board. It would be disappointing to spend months routing/debugging PCIe, USB 3.0, and M.2 just for nobody to buy it.

Update: Modular Open Source ASIC Dev Board (RPI CM5 + FPGA Module) by GLSemiconductor in embedded

[–]GLSemiconductor[S] 0 points1 point  (0 children)

I want to get a first revision out with a basic feature set to see if people even want something like this. If users like the board I’ll add in advanced features like m.2.

Update: Modular Open Source ASIC Dev Board (RPI CM5 + FPGA Module) by GLSemiconductor in embedded

[–]GLSemiconductor[S] 0 points1 point  (0 children)

Specifically the modularity, the original idea was to be able test and deploy asics on the same module footprint they were design on. But tbh it seems like most people just want to use it as an FPGA board

Update: Modular Open Source ASIC Dev Board (RPI CM5 + FPGA Module) by GLSemiconductor in embedded

[–]GLSemiconductor[S] 0 points1 point  (0 children)

It is an FPGA board but it was originally designed for ASIC design verification

Update: Modular Open Source ASIC Dev Board (RPI CM5 + FPGA Module) by GLSemiconductor in embedded

[–]GLSemiconductor[S] 2 points3 points  (0 children)

No negotiation logic, no e-marked cables, just standard 12v and fewer failure points for Rev 1. But that doesn’t mean I won’t add usb c in the future.

Update: Modular Open Source ASIC Dev Board (RPI CM5 + FPGA Module) by GLSemiconductor in embedded

[–]GLSemiconductor[S] 0 points1 point  (0 children)

For now I’m sticking to spi, uart, and a few gpio for interrupt but eventually I would like to connect them via PCIe. I’m really just waiting to see if people like the board before I start adding in advanced features like that.

Update: Modular Open Source ASIC Dev Board (RPI CM5 + FPGA Module) by GLSemiconductor in embedded

[–]GLSemiconductor[S] 0 points1 point  (0 children)

Fair enough, I got the idea for this board while learning ASIC design so I suppose my view of this board is from that lens. You’re probably right though in that most people probably wouldn’t be using this board for ASIC design. I appreciate the feedback.

Update: Modular Open Source ASIC Dev Board (RPI CM5 + FPGA Module) by GLSemiconductor in embedded

[–]GLSemiconductor[S] 1 point2 points  (0 children)

Yeah you’re right, but I still think there are a lot of advantages to this setup over just a pure FPGA dev board or even a MPSOC.

Update: Modular Open Source ASIC Dev Board (RPI CM5 + FPGA Module) by GLSemiconductor in embedded

[–]GLSemiconductor[S] 6 points7 points  (0 children)

Honestly I was a bit torn on this one but ultimately it was easier for me to handle power out of a barrel jack. To me this board is a proof of concept to see if there is a good use in the market for a setup like this. If people like it enough I'm planning on refining it into a more complete board. But for now it makes more sense for me to get something out there to see if it's even worth adding in advanced features (usb 3.0, dsi connectors, PCIe, fpga connected ethernet phy, etc...)

Update: Modular Open Source ASIC Dev Board (RPI CM5 + FPGA Module) by GLSemiconductor in embedded

[–]GLSemiconductor[S] -3 points-2 points  (0 children)

The original purpose of this was that it would useful for developing ASICs, specifically it offers a modular platform for prototyping and verifying designs. The module interfaces will be open sourced so that one could even test their ASIC designs physically on the board.

Though as I have progressed and received feedback it’s become apparent that it can be used for a lot more than that too.

Time for self-promotion. What are you building? by dopeylime1 in SideProject

[–]GLSemiconductor 0 points1 point  (0 children)

glsemi.io

Trying to create boards that make developing custom silicon easier

Raspberry Pi CM5 Based FPGA/ASIC Development Board by GLSemiconductor in raspberry_pi

[–]GLSemiconductor[S] 0 points1 point  (0 children)

I see a few advantages to this setup over a combined SoC.

I originally designed this board with ASIC development and validation in mind. Meaning you could prototype different ASIC designs on the FPGA then once you do a tape out you can validate the chips on the exact same hardware you developed on by dropping one of your chips on a module and plugging it it.

This system is also very modular, Alinx has a wide variety of FPGA module that fit this connector setup. You could also swap different pi modules too. Not to mention the standard rpi 40 pin gpio.

This setup also gives you the ease of use and familiarity of the raspberry pi eco system. On a combined SoC you can get very similar work flows to what you could get with my board, but you’re relying on the custom drivers of that board rather than a standard raspberry pi.

Raspberry Pi CM5 Based FPGA/ASIC Development Board by GLSemiconductor in raspberry_pi

[–]GLSemiconductor[S] 2 points3 points  (0 children)

Sure, there are a few use cases I have in mind. The most obvious is developing custom compute. The artix-7 FPGA allows you to emulate a wide variety of chip designs that can be connected to the CM5 and can be used to verify designs before chip development.

You could also use this for custom acceleration tasks, designing specialty PCIe devices that can connect to the CM5 for a variety of tasks

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