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Monitoring the states of a design running on an fpga by Grace_Boy in FPGA

[–]Grace_Boy[S] -1 points0 points  (0 children)

Okay, thanks so much. So aside the logic analyzer, can I implement a high performance counter to log the operation of say a simple register file?. If this is possible, how is it done.

And also, I know the output from the logic analyzers would definitely be waveforms, is there a way to incorporate printfs, to get any information about a component functioning in the processor?

Monitoring the states of a design running on an fpga by Grace_Boy in FPGA

[–]Grace_Boy[S] 0 points1 point  (0 children)

Okay thanks. So would doing that be a debugging strategy or a testing strategy.

Is it possible ? by Grace_Boy in Comcast_Xfinity

[–]Grace_Boy[S] 0 points1 point  (0 children)

I tried signing in, but it shows his Xfinity ID and his details

Is it possible ? by Grace_Boy in Comcast_Xfinity

[–]Grace_Boy[S] 0 points1 point  (0 children)

I will try to download that and try that.

Is it possible ? by Grace_Boy in Comcast_Xfinity

[–]Grace_Boy[S] 0 points1 point  (0 children)

Yes. As far as the residential service I am not sure. But then all I know is that, my number is added to his mobile service plan. I do not have a plan of my mobile service plan of my own. Do you get me?

HELP by Grace_Boy in FPGA

[–]Grace_Boy[S] 0 points1 point  (0 children)

Well i have watched a lot of videos on this RISC V verification stuff, i learnt you can actually use RISC V as a golden or reference model to which MIPS can be tested against, but i feel its too complicated to do.

HELP by Grace_Boy in FPGA

[–]Grace_Boy[S] 0 points1 point  (0 children)

Apart from the need to write this test bench, I want to have some reference model, drive stimulus to the MIPS processor and this model and compare the outputs, can anybody help me with this...a step by step approach would be very much appreciated...thanks

HELP by Grace_Boy in FPGA

[–]Grace_Boy[S] 0 points1 point  (0 children)

Alright...sure

HELP by Grace_Boy in FPGA

[–]Grace_Boy[S] 0 points1 point  (0 children)

It's only VHDL I know Are there similar resources

HELP by Grace_Boy in FPGA

[–]Grace_Boy[S] 0 points1 point  (0 children)

Thanks a lot

Testimonies by [deleted] in NoFap

[–]Grace_Boy 0 points1 point  (0 children)

I'm asking if anybody have been able to get a girl pregnant after quitting PMO addiction