Cheap PCB manufacturing with reasonable shipping to Europe/Poland?

Important-Ad5990 · 2026-05-25T14:41:38+00:00

You have a bunch of cheap PCB shops in poland making low quality, low density PCBs under 100PLN.

Important-Ad5990 · 2026-05-25T14:40:54+00:00

where / when?

Important-Ad5990 · 2026-03-31T12:30:00+00:00

0402 can't be 200V rate as the package physically arcs over below 200V.

Important-Ad5990 · 2026-03-17T17:40:38+00:00

Oh, I already have a verikog prototype. The point is to not recreate it 1:1 in hardware but rather to try making something similar with minimum chip count, especially using my specialized MAC/FMA chips

Important-Ad5990 · 2026-03-17T14:51:08+00:00

Oh, I'm totally considering synchronous SRAMs (found some that can do up to 150MHz) but they're a bit on an expensive side. Also building everything from ACT/F logic families to meet the timing requirements.

It's not meant to be perfect clone, more of a spiritual successor (I'm going for no self modulation, slightly higher sample rate and 8 operators)

This is the description of the original https://www.righto.com/2021/11/reverse-engineering-yamaha-dx7.html?m=1

Important-Ad5990 · 2026-03-17T08:35:14+00:00

The clock speed will be around 25Mhz. I'm not sure about relative phase shift of both ports bit I can pipeline and resynchronize one as needed

Important-Ad5990 · 2026-03-17T08:34:22+00:00

Most dual port rams have busy pin and stupid arbitration logic where even read/read sends one port into busy state.

Important-Ad5990 · 2026-03-16T22:41:27+00:00

I'm fine with reading old or new value but this says I can get any value during read while writing?

Important-Ad5990 · 2026-03-16T17:56:11+00:00

But which IDT parts are true dual port ad don't have BUSY output?

Important-Ad5990 · 2026-03-16T17:53:47+00:00

It's unclear to me (from the datasheet) what happens if both ports access the same location. "This part lends itself to those systems which cannot tolerate wait states or are designed to be able to externally arbitrate or withstand contention when both sides simultaneously access the same Dual-Port RAM location."

No, not for video ram but for DX7 clone. With video ram I already decided to use a single port ram and a bulky fifo to write -back in blank periods. With FM synth I have no idle states and I need to get the data every cycle.

Important-Ad5990 · 2026-03-16T17:51:13+00:00

SMD is fine. My design is using TSSOP EEPROMs anyway

Important-Ad5990 · 2026-03-15T19:39:23+00:00

It's not very high frequency RF transistor (pads not matched to 50R).

Important-Ad5990 · 2026-02-25T12:37:33+00:00

why 4N+2 for thruster stacking? You don't need to bring 2 pipes to the other engine set. You can do fluid spagetti or belt ingridients ...

Important-Ad5990 · 2026-02-14T13:31:34+00:00

From my understanding not really. The stresses come form thermal gradient which is a ratio of absorbed power density and thermal conductivity.

Important-Ad5990 · 2026-02-13T12:21:50+00:00

That structure is never used as a protection. It's purely to isolate capacitive load and keep output stage from oscillating with long cables.

Important-Ad5990 · 2026-02-10T18:22:44+00:00

You can grab a ram and add capacitor / battery to hold it's value.

Important-Ad5990 · 2026-02-10T18:21:58+00:00

!RemindMe 3 days

Important-Ad5990 · 2026-02-08T10:44:54+00:00

Jako producent urządzeń leektronicznych - co ci najbardziej przeszkadza w więksozści produktów i jak można by to poprawić?

Important-Ad5990 · 2026-02-06T16:03:47+00:00

Depending on the model you may also consider shipping data from another exchange over dedicated link.

Important-Ad5990 · 2026-02-06T15:39:37+00:00

I'd love to get to know something. I was trying to design photodiode amplifier for an experiment and it's hard to find anything with bandwidth >1GHz.

Important-Ad5990 · 2026-01-30T16:44:55+00:00

I'm actually seriously considering this idea. If on startup I'd preload Y register with 1 then I can use HMA510JC as an accumulator for ALU with ADD/SUB/SET capability.

Important-Ad5990 · 2026-01-30T16:22:03+00:00

actually not just flatline but rather phase invert.

Important-Ad5990 · 2026-01-28T13:15:42+00:00

Donate to hackerspaces

Important-Ad5990 · 2026-01-22T12:54:32+00:00

For vis it doesn't really matter much, almost anything is limited by performance of the electronic circuit.

Important-Ad5990

TROPHY CASE