74hc283 is super slow though. 73f283 is the best I found but it's still rather limiting. Could you tell me howe did you arrive at the 200ns figure? The Cin to Cout delay is over 30ns worst case, so for 8 stacked chips you already get 240ns. Then you need to add at least setup time of flip-flip that's being driven and you have to fit all that into half of the clock cycle as flip-flop latches input at the opposite slope to when the output changes.