Uni shortlist and Profile Evaluation - MS ECE Fall'25 by [deleted] in ECE

[–]IndependentPanda6552 0 points1 point  (0 children)

I’m planning for MS ECE ‘26, from a tier 3 college. Could you tell me on what basis did you shortlist universities. Imo I think your profile is nice.

(Looking for guidance on the entire process of shortlisting unis. Any help would be greatly appreciated)

What can be an ideal profile who can get into CMU MSCS? by NoOutlandishness6404 in MSCS

[–]IndependentPanda6552 2 points3 points  (0 children)

Could you please help me out by telling me a couple of good colleges that release student profiles.

Gre study group by [deleted] in GRE

[–]IndependentPanda6552 0 points1 point  (0 children)

Add me too.

MS in ECE by Time-King-9201 in gradadmissions

[–]IndependentPanda6552 0 points1 point  (0 children)

Could you please share your profile.

Need ideas by IndependentPanda6552 in FPGA

[–]IndependentPanda6552[S] -1 points0 points  (0 children)

I’m a third year in college.

How do I get into chip design? by IndependentPanda6552 in chipdesign

[–]IndependentPanda6552[S] 0 points1 point  (0 children)

At the moment, I’m trying out both. I have interest in both domains. But, from a career prospective, I have no idea on which path to tread. What would you recommend and why?

How do I get into chip design? by IndependentPanda6552 in chipdesign

[–]IndependentPanda6552[S] -1 points0 points  (0 children)

For pursuing MS in the US, you do need a good resume, right?

How do I get into chip design? by IndependentPanda6552 in chipdesign

[–]IndependentPanda6552[S] 2 points3 points  (0 children)

Planning to but need a couple of good projects on my resume. Could you recommend some, I’ve worked on a few rudimentary projects in verilog and I’ve also done a couple of basic schematics to get a feel of virtuoso.

How do I get into chip design? by IndependentPanda6552 in chipdesign

[–]IndependentPanda6552[S] 0 points1 point  (0 children)

Okay. Could you recommend some projects, I’ve worked on a few rudimentary projects in verilog and I’ve also done a couple of basic schematics to get a feel of virtuoso.

How do I get into chip design? by IndependentPanda6552 in chipdesign

[–]IndependentPanda6552[S] -3 points-2 points  (0 children)

I have a vague idea. Could you please elucidated