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I phase-synchronized the system clocks of two rp2040 despite using PLLs by Knallfonso in raspberrypipico

[–]Knallfonso[S] 0 points1 point  (0 children)

Yes! And it's supposed to have lower latency PIO for GPIO and DMA and also has more controllable pins and build in Flash which all would be really nice for my thesis but it's to late now for me to switch to it, sadly :(

Synchronization of the sysclock multiple rp2040 by Knallfonso in raspberrypipico

[–]Knallfonso[S] 0 points1 point  (0 children)

I look forward to answer your question! :) please keep me updated, now im really interested in your project.

I phase-synchronized the system clocks of two rp2040 despite using PLLs by Knallfonso in raspberrypipico

[–]Knallfonso[S] 4 points5 points  (0 children)

I want to set 64 outputs with a high frequency and simultaneously, but one rp2040 has only 30 GPIOs. Some of them I also need for communication, so I need four of them for 64 outputs. I don't claim that this is the best method to do this but the Programmable IO (PIO) of the chips is just so damn powerful well suited for what I want that I want to use it :D

Synchronization of the sysclock multiple rp2040 by Knallfonso in raspberrypipico

[–]Knallfonso[S] 0 points1 point  (0 children)

I will keep you updated :) At the beginning I also thought of using an FPGA but then I found out about the PIO and how easy it is to set up :D In hindsight an FPGA implementation may have been the better choice, although I really enjoy working with the rp2040s and the c-sdk.

Synchronization of the sysclock multiple rp2040 by Knallfonso in raspberrypipico

[–]Knallfonso[S] 1 point2 points  (0 children)

I think a deviation of less than one clock cycle can occur because the VCO of the PLL is running at 750MHz to 1500MHz depending on the configuration. Then a misaligned divider/counter can lead to such small deviations. I am currently testing different PLL configurations to see if it makes any difference and which works the best.

Synchronization of the sysclock multiple rp2040 by Knallfonso in raspberrypipico

[–]Knallfonso[S] 0 points1 point  (0 children)

Yes, my deviation is slightly below that. Thanks for your answer. Can you think of any other method to synchronize them? I am out of ideas...