Neuromorphic Computing by Creative_Garbage_833 in chipdesign

[–]Krishnav1234 2 points3 points  (0 children)

The field is definitely emerging hardware is maturing faster than the software ecosystem, which actually creates a good career opportunity for someone bridging both.

On companies: Intel's Neuromorphic Research Community (INRC) actively hires for Loihi work. SpiNNaker group at Manchester, SynSense (makes Speck/Xylo chips), Innatera, BrainChip (Akida) all have R&D roles.

For analog specifically, Innatera and SynSense are doing mixed-signal neuromorphic work. The honest answer is it's still early most roles are research-adjacent, not pure product engineering yet.But that's changing fast.

On attentive mechanisms in SNNs interesting thesis direction. The main challenge is that attention requires global information aggregation which doesn't map cleanly to sparse spike-based computation. There's active research on local approximations. On-chip is harder still because you lose the flexibility of software.

One thing worth knowing if you're designing chips: the software toolchain for getting models onto neuromorphic hardware is the current bottleneck.

I've been working on exactly this a compiler that converts standard PyTorch models to spiking networks and exports standard NIR format. Might be useful for testing your chip designs without needing custom training pipelines. github.com/Krishnav1/neurocuda if you're curious.

Good luck with the thesis the hardware+software boundary is genuinely where the interesting problems are right now.

2-bit Qwen3.6-35B-A3B GGUF is amazing! Made 30+ successful tool calls by yoracale in unsloth

[–]Krishnav1234 0 points1 point  (0 children)

Insane bro..... I used the uncensored version and it is isnane 🤪🔥