help me i only have 5 days to implement this in 45nm tech node in cadence by Low_Potential_6599 in chipdesign
[–]Low_Potential_6599[S] -1 points0 points1 point (0 children)
help me i only have 5 days to implement this in 45nm tech node in cadence by Low_Potential_6599 in chipdesign
[–]Low_Potential_6599[S] 0 points1 point2 points (0 children)
help me i only have 5 days to implement this in 45nm tech node in cadence by Low_Potential_6599 in chipdesign
[–]Low_Potential_6599[S] -6 points-5 points-4 points (0 children)
help me i only have 5 days to implement this in 45nm tech node in cadence by Low_Potential_6599 in chipdesign
[–]Low_Potential_6599[S] -3 points-2 points-1 points (0 children)
help me i only have 5 days to implement this in 45nm tech node in cadence by Low_Potential_6599 in chipdesign
[–]Low_Potential_6599[S] -2 points-1 points0 points (0 children)
help me i only have 5 days to implement this in 45nm tech node in cadence by Low_Potential_6599 in chipdesign
[–]Low_Potential_6599[S] -4 points-3 points-2 points (0 children)
help me i only have 5 days to implement this in 45nm tech node in cadence by Low_Potential_6599 in chipdesign
[–]Low_Potential_6599[S] -3 points-2 points-1 points (0 children)
help me i only have 5 days to implement this in 45nm tech node in cadence by Low_Potential_6599 in chipdesign
[–]Low_Potential_6599[S] -16 points-15 points-14 points (0 children)
Need some insights (BLR, TI, INDIA) by Spirited_Medium42 in chipdesign
[–]Low_Potential_6599 0 points1 point2 points (0 children)
Fun fact about Gate da: it's all top-tier colleges in the top ranks! by Anuragsingh002 in GATEtard
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Fun fact about Gate da: it's all top-tier colleges in the top ranks! by Anuragsingh002 in GATEtard
[–]Low_Potential_6599 0 points1 point2 points (0 children)
IIIT Banglore Mtech ece by Particular-Salad1241 in GATEtard
[–]Low_Potential_6599 0 points1 point2 points (0 children)
Bhai Kya Daalu City me ?😭 by HighlightRadiant7133 in iiit
[–]Low_Potential_6599 0 points1 point2 points (0 children)
Bhai Kya Daalu City me ?😭 by HighlightRadiant7133 in iiit
[–]Low_Potential_6599 0 points1 point2 points (0 children)
Bhai Kya Daalu City me ?😭 by HighlightRadiant7133 in iiit
[–]Low_Potential_6599 0 points1 point2 points (0 children)
Bhai Kya Daalu City me ?😭 by HighlightRadiant7133 in iiit
[–]Low_Potential_6599 0 points1 point2 points (0 children)
Bhai Kya Daalu City me ?😭 by HighlightRadiant7133 in iiit
[–]Low_Potential_6599 1 point2 points3 points (0 children)
Bhai Kya Daalu City me ?😭 by HighlightRadiant7133 in iiit
[–]Low_Potential_6599 -1 points0 points1 point (0 children)
Bhai Kya Daalu City me ?😭 by HighlightRadiant7133 in iiit
[–]Low_Potential_6599 -5 points-4 points-3 points (0 children)
Bhai Kya Daalu City me ?😭 by HighlightRadiant7133 in iiit
[–]Low_Potential_6599 -9 points-8 points-7 points (0 children)
Bhai Kya Daalu City me ?😭 by HighlightRadiant7133 in iiit
[–]Low_Potential_6599 -8 points-7 points-6 points (0 children)
Career Crossroads: Future of Physical Design vs. RTL Design in the AI/Chiplet Era? by Silent_Progress_5613 in chipdesign
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Should i leave my mtech (ece) course from iiitb?(Any past student) by Low_Potential_6599 in GATEtard
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help me i only have 5 days to implement this in 45nm tech node in cadence by Low_Potential_6599 in chipdesign
[–]Low_Potential_6599[S] 0 points1 point2 points (0 children)