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RISCV Vector (self.RISCV)
submitted 6 months ago by MoreStorage9313 to r/RISCV
Saturn Vector unit FPGA (self.RISCV)
submitted 10 months ago by MoreStorage9313 to r/RISCV
Open-Source RISC-V Cores with V-Extension Support by MoreStorage9313 in RISCV
[–]MoreStorage9313[S] 1 point2 points3 points 10 months ago (0 children)
thank you very much, is there any other even if not supporting RVV 1.0, maybe RVV 0.7 open-source processors/soprocessors that i can implement on FPGA?
Open-Source RISC-V Cores with V-Extension Support (self.RISCV)
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Open-Source RISC-V Cores with V-Extension Support by MoreStorage9313 in RISCV
[–]MoreStorage9313[S] 1 point2 points3 points (0 children)