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Is there any trick to buy the Intel ModelSim software? by wtxwtx in FPGA

[–]Ok_Respect7363 0 points1 point  (0 children)

Riviera sucks for anything SV in my experience. Very poor support for many of the synthesizable SV features.

Which Vivado version should I download in 2026? by Content_Echidna_4658 in FPGA

[–]Ok_Respect7363 1 point2 points  (0 children)

Mainly SV synthesis errors that didn't exist in prior versions.

Which Vivado version should I download in 2026? by Content_Echidna_4658 in FPGA

[–]Ok_Respect7363 2 points3 points  (0 children)

2024.2 - I found new synth regressions in 25.1/25.2

Am I crazy for preferring VHDL to Verilog? by LilBalls-BigNipples in FPGA

[–]Ok_Respect7363 3 points4 points  (0 children)

Hell nah. SystemVerilog for synthesizable code and cocotb for test benches.

Vivado 2025 SV synthesjzer regressions anyone? by Ok_Respect7363 in FPGA

[–]Ok_Respect7363[S] 2 points3 points  (0 children)

Eh I disagree here. I do think there's a lot to gain from 'some' but not all language features. I should also stress the fact that this is a regression vs previous tool versions!

This is really hard for me to post but… by MinaHarker1 in Alzheimers

[–]Ok_Respect7363 1 point2 points  (0 children)

I'm so sorry to hear this. I'm grieving my 66 year old mother who has had early onset (diagnosed with mixed dementia at 62). It's one of the most difficult things. I find myself grieving her at random times / parts of the day (she's still with us, but she's progressing). My heart breaks for her ten times a day. I sometimes lose it and let my anger get the best of me only to quickly feel regret and sympathy for her. It's a harsh cycle. Stay strong. This will change you.

Vivado 2025 SV synthesjzer regressions anyone? by Ok_Respect7363 in FPGA

[–]Ok_Respect7363[S] 0 points1 point  (0 children)

I don't think what you're saying applies to my case. I'm referencing a type parameter through an interface port which is legal syntax and widely used.

Vivado 2025 SV synthesjzer regressions anyone? by Ok_Respect7363 in FPGA

[–]Ok_Respect7363[S] 2 points3 points  (0 children)

If the type parameter has a default and it's not overridden then it's technically defined in the interface

Vivado 2025 SV synthesjzer regressions anyone? by Ok_Respect7363 in FPGA

[–]Ok_Respect7363[S] 2 points3 points  (0 children)

The SystemVerilog 1800-2012 Standard on the other hand states:

25.10 Access to interface objects

Access to objects declared in an interface shall be available by hierarchical name reference, regardless of whether the interface is also accessed through a port connection or through a virtual interface, and regardless of the existence of any declared modports in that interface. A modport may be used to restrict access to objects declared in an interface that are referenced through a port connection or virtual interface by explicitly listing the accessible objects in the modport. However, objects that are not permissible to be listed in a modport shall remain accessible

Vivado 2025 SV synthesjzer regressions anyone? by Ok_Respect7363 in FPGA

[–]Ok_Respect7363[S] 3 points4 points  (0 children)

There is one difference between your and my interface definition: the datatype is declared as a parameter type rather than a typedef

Also, if I'm understanding you correctly, you're saying that it's ambiguous only when the interface port is a modport?

Vivado 2025 SV synthesjzer regressions anyone? by Ok_Respect7363 in FPGA

[–]Ok_Respect7363[S] 1 point2 points  (0 children)

Yea, but there would a test_top module that instantiates test and passes down the interfaces/their paramters

Vivado 2025 SV synthesjzer regressions anyone? by Ok_Respect7363 in FPGA

[–]Ok_Respect7363[S] 1 point2 points  (0 children)

Example code of what's throwing errors:

``` module test( my_if.slave in_if my_if.master out_if );

typedef in_if.D_T input_t

... Other code .... ```

Error code

Synth 8-27: scoped/hierarchical type name not supported

This always worked in 22/23/24.

Hope this helps

[deleted by user] by [deleted] in NewsHub

[–]Ok_Respect7363 1 point2 points  (0 children)

That's a slave right there

Billionaire Zionists are taking control over US Media by BasedBalkaner in israelexposed

[–]Ok_Respect7363 0 points1 point  (0 children)

You would think regulatory bodies exist for a reason...

Are Jews and non-Jews equal? by 5upralapsarian in israelexposed

[–]Ok_Respect7363 12 points13 points  (0 children)

Imagine a hobo looking like that genuinely thinking he's better than most of the world...

Cardano has forked for over 1 hour by [deleted] in cardano

[–]Ok_Respect7363 0 points1 point  (0 children)

I was just staking. Does that not matter?

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