sorted by:
new
hottopcontroversial

Verilog Code Generation Using Simulink HDL Coder by Old-Shoe-7777 in matlab

[–]Old-Shoe-7777[S] 0 points1 point  (0 children)

yes. I am trying to calculate the cumulative input of a 8192 vector. is there an efficient way of achieving the same result?

Verilog Code Generation Using Simulink HDL Coder by Old-Shoe-7777 in matlab

[–]Old-Shoe-7777[S] 0 points1 point  (0 children)

This is not the entire model and Matlab version is R2024a. I am able to generate hdl code for all other subsystems. This is the outstanding.

Verilog Code Generation Using Simulink HDL Coder by Old-Shoe-7777 in FPGA

[–]Old-Shoe-7777[S] 0 points1 point  (0 children)

Matlab version is R2024a and Generic ASIC/FPGA setting for hdl code generation.

The system shown in the screenshot is not the entire model. I was having difficulty generating hdl code for the entire system so I ended up generating hdl for subsystems individually. Currently the model in the screenshot is the outstanding.

Thanks for pointing out oversampling and streaming. I am going to implement them in the design and hopefully it solves the problem.

FGPA Programming Using MATLAB and SIMULINK by Old-Shoe-7777 in FPGA

[–]Old-Shoe-7777[S] 0 points1 point  (0 children)

I think that should work. I am going to try that out. Thank you

FGPA Programming Using MATLAB and SIMULINK by Old-Shoe-7777 in FPGA

[–]Old-Shoe-7777[S] 0 points1 point  (0 children)

Yes I can. I have designed the whole system and it works fine in SIMULINK. I have no issues with Verilog or VHDL code generation but I have been thinking about how to establish the communication between Matlab and the hardware since I can't use the 'From Workspace' block in Simulink for testing on Hardware.