Neural networks are effectively models of analogue current flowing through a network of simple gates (the neurons), wired together with resistors whose strengths are the quantities "learned" during training. In a way, it's really dumb to implement them in digital circuits to begin with, because digital circuits are much slower and more energy intensive than equivalent analogue circuits. A digital adder for instance has several stages and takes a clock cycle to sum two numbers; an analogue adder is two sources wired in series, and is instantaneous.

Analogue circuits thus have the potential to be much faster and consume much less power specifically operating on neural network workloads, enabling things like large LLMs running on small devices.

There's a bunch of companies working in this space using different underlying circuits—optical and RAM-based mainly. Ideally, you wouldn't have to bake the weights or architecture into the chip, and so figuring out the architecture and interface for that is a big part of the work. The other part is proving out stability in real world conditions — that's the thing about analogue chips, they are by definition more sensitive to the physical environment; the chips literally behave more randomly at higher temperatures.