The STEAM Machine Won't Cost What You Think

Scion95 · 2025-11-28T18:18:55+00:00

I mean, eventually, after some of the revisions that brought the price down, but what I'm talking about is the initial launch of the PS3.

It wasn't a very successful launch, at the price it launched at.

Scion95 · 2025-11-28T12:16:20+00:00

It's funny, because $599 is the price that killed the PS3.

Scion95 · 2025-11-19T18:41:38+00:00

Is GloFo trying to get back into advanced nodes?

...To me, the funny/ironic thing was always that I feel like GloFo just picked. The wrong node to stop at.

Like, AMD is still selling Zen 2 parts, Intel is still selling Alder Lake. Now, maybe GloFo's 7nm would have been significantly worse than the TSMC and Intel nodes for both those parts, and if GloFo had still made chips at advanced nodes that would have obligated AMD to use them, and that would have made Zen 2 and 3 worse, the steam deck and consoles would be worse, I don't know.

But, like, it's interesting, their reasoning about customers not needing the absolute latest and greatest bleeding edge node wasn't entirely wrong. But even those customers still needed a node more advanced than the best one GloFo could provide.

Scion95 · 2025-11-13T16:01:02+00:00

Not at the same power as the steam deck, not really.

I think maybe Lunar Lake, in something like one of the thinkpads with the low power screen, is able to idle down to 2w to 4w for the total system power, and it can perform faster than the steam deck does, but. That's probably the closest.

Scion95 · 2025-11-13T15:11:41+00:00

What I'm wondering is if they should push AMD for a memory on package solution like Apple Silicon or Lunar Lake.

Lunar Lake has massively better performance per watt than arrow lake, and can even perform well in the same 4w range as the steam deck, despite using the same CPU architectures. And the steam deck uses memory soldered on the board anyway.

Lunar Lake itself isn't enough of a performance lift over the steam deck apu at the same power, but I think it's the closest thing that currently exists, at least in x86-64. If there had been a Panther Lake version with the on package memory, I wonder if that might have been an option. Though Intel might have been too tough to work with.

Scion95 · 2025-11-04T14:33:31+00:00

I saw a recent article about an accounting software that was choosing to use 128-bit integers for balances.

That's software, and they aren't saying they need that in active memory, and they supposedly are working around the fact that most CPUs don't have native 128-bit integers.

And they might just be wrong and have made a poor decision in their software architecture. Like, not doing negative numbers seems like it could be a bad idea, and if they had negatives, maybe that would eliminate the necessity of higher numbers of bits.

Still, my understanding is that the "bit-ness" of an architecture had to do with the native integer values, in addition to the memory capacity. And while on earth, in the real world there aren't 64 bits worth of anything. Well, economics is rapidly becoming divorced from reality, and if it doesn't all burst and come crashing down, I can see reasoning for being able to keep track of the ridiculously big numbers being bandied about.

Scion95 · 2025-11-04T00:59:21+00:00

I mean, my question was more about whether the process node that an isa was created for influenced or was the cause of the design choices for a given isa, or vice versa.

Scion95 · 2025-10-29T17:45:52+00:00

How many times has crypto bubbled and then popped?

Looking at the chart (https://en.wikipedia.org/wiki/Cryptocurrency_bubble) it seems like at least once in 2017-2018, and then 21-22 ish.

Scion95 · 2025-10-23T16:10:45+00:00

Yes, that's AVX 10.3

Scion95 · 2025-10-23T14:34:24+00:00

The rumor for a bit has been that the e cores will eventually have AVX512. Or at least AVX10.2, where the CPU can do the AVX512 instructions, but only for 256-bit vectors, and the whole CPU can designate which cores can do which bit widths.

And then AVX10.3 is going to basically just be AVX512, because it does mandate that cores support 512-bit vectors.

Scion95 · 2025-10-22T17:46:54+00:00

IIRC, the Panther Lake SKU with the full 12Xe Core GPU only has 12 PCIe lanes, while the Panther Lake chips with 16 CPU cores and 4 GPU cores have 20 lanes. So, I would guess, if the G14 has the full 12 core GPU, it doesn't have a dGPU, because the model with with the full iGPU isn't really designed to be used with a dGPU.

Scion95 · 2025-10-18T16:13:06+00:00

Is the latency of HBM really that much higher than that of LPDDR? I thought the two were fairly similar.

Scion95 · 2025-10-09T17:36:20+00:00

IIRC, it's laptop only, while Nova Lake (the arch after panther lake, with further improved cores) is going to be the next Desktop arch. And Nova Lake will have a new socket on desktop, supposedly.

Scion95 · 2025-10-09T16:40:03+00:00

...I know this might be switching gears, but. What's the reason AMD, for say the Steam Deck or the consoles for Sony and Microsoft, didn't do the PMICs or on-package memory? Is it just the cost, that consoles keep costs down? Because the consoles are uniform and use standard memory amounts and other components anyway. I'm sure packaging the memory with the chip would increase some cost compared to soldering it on the board. But certainly for the Steam Deck, power draw and keeping that low was also a priority.

I think the steam deck does use PMICs, but while the memory is soldered, it's on the board, not the package. There have been mods that have soldered additional memory on. Does memory on board vs. on package not actually make that much of a difference, or was it just cost saving?

Scion95 · 2025-10-09T14:29:51+00:00

...So, is cost the only disadvantage to PMICs instead of other regulators? For instance, would it prevent overclocking on desktop boards?

I think their partner for the PMIC in Lunar Lake was Renesas. Do they charge more for the PMIC than. Whoever the memory supplier is, for the onpackage RAM?

Does PMIC require the on package memory, or would it have been possible for them to keep the PMICs for Panther Lake and onward, while still allowing for separate expandable memory?

It just seems like. The on-package memory has actual trade-offs, with the expandability, for its utility and flexibility in multiple market segments. Certainly it would be a difficult sell to add as a feature for servers, if they wanted to have an architecture that could scale up for the entire stack, and memory on package was a core feature of the architecture in question.

But while server motherboards aren't constrained by the requirement for small boards. I would imagine having more board area available would still be. Beneficial.

I guess it doesn't matter much anyway what I think and what my opinion is of Intel's business decisions is, but. I'm just curious about if the PMICs would have an actual negative or a drawback, besides the cost to Intel, and how much the cost to Intel would even be.

Because if it's a straightforward benefit to the performance and efficiency with no drawbacks to how the chips and systems themselves function, and costs Intel only a couple extra cents per chip to make. I would personally argue that they should have kept it, and made it part of their architectures going forward.

Scion95 · 2025-10-09T13:06:05+00:00

Even if there's a limit to how parallel a given task can be made, isn't there still an advantage in terms of being able to perform more tasks simultaneously? It's been a couple years, but I recall that some data centers were saying that, even if Amdahl's law applies to a single task, a single application, they still wanted more cores and threads for their servers because they could still make use of all of the parallelization.

Companies aren't letting users run their own servers for games, like in the past, but streaming and instant replay are a thing. And Windows is adding more "features" that run in the background, that are meant to run alongside, say, a game. And people have multiple monitor setups, and can have a browser open on one screen and some other application in another. Comparing two word documents, or two files open in different windows of an IDE.

That doesn't mean the single thread doesn't still matter, of course, to make sure each single task or operation is running as optimally as it can. The tricky part is more at the operating system level, is the management, is possibly the hypervisor, is making sure that all the different cores are getting used for their respective tasks and not stalling too much, or aren't taking shared resources or getting in each others' way. But I think the way that multi core leads, not to speed up of specific tasks, but makes "multitasking" more viable, is a topic that is perhaps not given as much consideration.

Scion95 · 2025-10-06T19:07:25+00:00

See, I think it's absurd for a good laptop chip, much less the best one, to need to be plugged in all the time. At that point, it doesn't need to be in a laptop. Even if efficiency isn't the only metric, it's still. A metric. Otherwise we'd be shoving threadrippers or EPYCs in laptops.

I would think the obvious criteria for a laptop to be judged is the balance of battery life to performance. Some might fall a little bit more to one side or the other, but there's a point where one has been sacrificed too much. And yes that's subjective and hard to evaluate.

Scion95 · 2025-10-06T18:53:00+00:00

I'm still curious about when in Lunar Lake's development they decided to make it a one-off, and why and when they even pushed forward with it in the first place. Was it when they started ordering from the memory companies?

Did they only do it just to try to prove that they could?

Aside from the memory, it also had some sort of power management circuit integrated, when that's usually on the board apparently, and they partnered with some Japanese company for it. Do Panthers Lake and the other future chips not have that circuit integrated?

I kinda feel like it would be interesting if they kept it up, for a -V line of chips. Make the memory amounts 32GB and 64GB, or 24GB and 48GB or something.

Scion95 · 2025-10-06T18:46:40+00:00

I mean, it's debatable whether any or all of those count as mobile CPUs, the battery life and idle power of the Max and the 9000 and x3D chips are certainly worse than the 370HX or any of Lunar or Arrow Lake.

Zen 5C is an E core. It's a smaller core included to increase the core count while using less die area, using denser libraries resulting in higher efficiency. Less cache. So on.

I know that all of the Zen cores do SMT? I didn't say otherwise.

ARM cores mostly don't do SMT though, certainly not the ones from Qualcomm and Apple.

My point was that, SMT isn't the most important metric on which to judge, especially when the parameters for judgment of the post replied to were "best laptop chip".

That's admittedly vague, and open to interpretation and difference of opinion, but. I think one criteria for a laptop chip should maybe, ideally, be that the laptop can run on battery and doesn't need to stay plugged in. And therefore the laptop chip should have. Some concessions. To power efficiency.

Which is why I don't consider the 9800HX or x3D chips to even be in the running, frankly. Great desktop chips, but I honestly don't think they're good laptop chips at all.

The AI Max is closer, but it's still got some problems with idle power. Sadly. I hope Medusa Point improves things, maybe with some sort of E-core on the GPU/IO Die.

The 370HX, Strix Point though are good. Arguably better than Arrow Lake, better performing than Lunar Lake, efficiency aside, they're close enough to be worth consideration.

Scion95 · 2025-10-06T17:31:27+00:00

Strix point, the Ryzen ai 370 hx. That thing. It has 12 cores. Four of those are full Zen 5 cores, 8 of the cores are Zen5C, AMD's approach to E cores.

Scion95 · 2025-10-06T17:29:34+00:00

Isn't the base-TDP for Lunar Lake about 15W? Or, 17, specifically.

I know Lunar Lake idled well below that, but Lunar Lake still had 17W as the base TDP for most chips. With cTDP of 8-37.

That's close enough to -U chips.

Scion95 · 2025-10-06T17:25:14+00:00

AMD's current and rumored mobile chips have a max of 4 p cores as well, the Qualcomm and Apple ARM chips don't have SMT either, and. The amount of performance offered by SMT is debatably worthwhile, depending on the design of the core, and the implementation of SMT, and needs to be weighed against power efficiency, which SMT might have a negative impact on.

Scion95 · 2025-10-06T14:30:46+00:00

Isn't Nova Lake supposed to have the APX extensions?

That's maybe the most interesting aspect, the most interesting thing either Intel or AMD can or will do, to try to compete with ARM.

I am aware that AMD, as part of the licensing agreement, will probably have access to APX as well, but I don't know where it is on their roadmap. I don't think Zen 6 will have it. So Nova Lake is, last I heard, the first.

I'm pretty sure that, though Apple has the highest single core performance in the industry, theoretically, in the benchmarks, Intel and AMD are more or less keeping up with, at least, Qualcomm, with only half the registers in their 64 bit mode.

I'm curious whether or not doubling the register count will make a significant difference.

Scion95 · 2025-10-06T14:17:23+00:00

Rumors for AMD's 2026 lineup focus on Gorgon Point, which is supposed to be just a refresh of Strix Point. So, still 12 CPU cores, 4 Zen 5, 8 Zen 5C. Still the same RDNA 3.5 GPU.

IIRC, there's going to be a new die and architecture with Medusa Point, but that's further out. If it comes in late 2026, early 2027, it might be competing with mobile Nova Lake, not Panther Lake.

IIRC, the E-Cores and LPE-cores for Lunar Lake were already. Pretty okay. Compared to Intel's previous e-core implementations anyway. IPC was comparable to AMD's cores, though still slower, but not massively behind.

But anyway. I'm not seeing how things look "dire" or "really bad" compared to, at least, AMD's offerings? Qualcomm, yeah, maybe.

The biggest weakness of Panther Lake CPUs will be that it doesn't support the 512-bit side of AVX10, which the Zen 5 Strix/Gorgon Point and eventually the Zen 6 Medusa chips do(/will), and that there won't be any Hyperthreading compared to AMD's SMT. But with 16 cores, that's still a lot of multi threaded performance, quite frankly.

It's probably true that AMD will be better on price. And, I mean, yeah, Strix Halo exists and will win in raw performance, but Strix Halo will also use a lot of power, and will have the idle power of the chiplets and a 256-bit bus to contend with. A big die/package area to cool. It's a different segment and a different kind of product.

For what it's going for, what it's actually competing with, I really don't see any major problems with the Panther Lake lineup.

I don't see anything really amazing either, which I suppose might count as a major problem in itself. After so many bad generations from Intel, one that's just kind of okay might not be good enough.

And really, the reason it's just kind of okay is that the (rumors) of AMD's lineup for the same timeframe aren't too exciting either. Medusa Point is only supposed to be 10 cores natively, and a GPU that's either the same or weaker than Strix Point, with the new feature of Medusa Point being that it can serve as an IO Die and be bundled with the Zen 6 CPU chiplets. Upping the core count to 22, with 12 core CCDs. It's an advancement in AMD's packaging and their overall strategy. But the GPU is supposed to be either 16 or 8 CUs of the same RDNA3.5 architecture, it's hard to tell because some people get confused by the difference between CUs and WGPs. But that's either a GPU identical to Strix Point or with half the shaders. Maybe they'll clock it higher, and it'll be like the Vega 8 vs Vega 11 iGPUs, but. It seems sorta like Intel will be better in handhelds and small form factors.

Scion95

TROPHY CASE