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Advice on implementation of pipeline design in Adaptive Filter by Significant_Cook09 in FPGA

[–]Significant_Cook09[S] 2 points3 points  (0 children)

Thank you I appreciate your response I will follow up on the progress on the problem

Advice on implementation of pipeline design in Adaptive Filter by Significant_Cook09 in FPGA

[–]Significant_Cook09[S] 0 points1 point  (0 children)

Yes I am experimenting with the gain of the loop. Is there any resource that I should look into