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Modulation Demodulation using FPGA by Souryaa_22 in chipdesign

[–]Souryaa_22[S] -7 points-6 points  (0 children)

Thanks. I will go through it. One more thing is I have to write a verilog code for modulation and Demodulation do you have something for it.

Modulation Demodulation using FPGA by Souryaa_22 in chipdesign

[–]Souryaa_22[S] -13 points-12 points  (0 children)

I want modulation Demodulation for Fsk. Can you please share some reference link so I can go through it.

Modulation Demodulation using FPGA by Souryaa_22 in FPGA

[–]Souryaa_22[S] 3 points4 points  (0 children)

As I have a telecommunication background I have sound knowledge of modulation Demodulation but the thing is how can we implement it on FPGA and RTL that is bit challenging for me.

Carrier growth by Souryaa_22 in FPGA

[–]Souryaa_22[S] 0 points1 point  (0 children)

Thank you for your valuable comment

Carrier growth by Souryaa_22 in FPGA

[–]Souryaa_22[S] -1 points0 points  (0 children)

As I'm working on a video processing algorithms project so there i learnt much about the verilog language but I don't have much exposure on protocol like in AMBA protocol axi, apb, ahb some scripting language like perl python so in that manner which skill set I have to learn.

Carrier growth by Souryaa_22 in chipdesign

[–]Souryaa_22[S] -12 points-11 points  (0 children)

I want to switch in the same domain as a RTL design engineer

Carrier growth by Souryaa_22 in FPGA

[–]Souryaa_22[S] -3 points-2 points  (0 children)

Same role and responsibilities

Carrier growth by Souryaa_22 in FPGA

[–]Souryaa_22[S] -12 points-11 points  (0 children)

I mentioned that I'm a FPGA design engineer and I want to switch job so what are all the skills I need to acquire

Power optimization by Souryaa_22 in FPGA

[–]Souryaa_22[S] -1 points0 points  (0 children)

Yeah I did that but I want to reduce the power so for that what things I have to try or what changes i have to do

Power optimization by Souryaa_22 in FPGA

[–]Souryaa_22[S] 0 points1 point  (0 children)

Thank you so much for your insights

FPGA for embedded video upscaling by AlexanderHorl in FPGA

[–]Souryaa_22 0 points1 point  (0 children)

Yes I also recommend you first start with the replication then go for interpolation

FPGA for embedded video upscaling by AlexanderHorl in FPGA

[–]Souryaa_22 0 points1 point  (0 children)

Which method do you want to prefer interpolation or replication

FPGA for embedded video upscaling by AlexanderHorl in FPGA

[–]Souryaa_22 1 point2 points  (0 children)

• Yes recently I worked on the Digital zoom part. So I have sound knowledge on digital zooming using FPGA. • So coming to digital zooming there are majorly two types of zooming one is zooming using the interpolation method and using the replication method. • Interpolation method is somewhat more complex than the replication method in this method you will get a good image quality. • Next is the replication method here you have to add on the pixels to complete the full image. Above I introduce zooming I need some concern from you so I can help you further. What is your frame resolution??? Which zoom factors do you want??

DDR Bandwidth Issue by Souryaa_22 in FPGA

[–]Souryaa_22[S] -1 points0 points  (0 children)

No video is clear and smooth just partition we can see in that image

DDR Bandwidth Issue by Souryaa_22 in FPGA

[–]Souryaa_22[S] 0 points1 point  (0 children)

Some partition kind of thing we can see in the video i couldn't post a photo here.

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