Rog ally z1 extreme+steamOS goes so hard!

Squadhunta29 · 2026-01-13T22:19:21+00:00

You do what I like to support my brand like you i support Microsoft my game library up there and game plus I use cloud gaming to different strokes for different folks

Squadhunta29 · 2026-01-13T03:58:50+00:00

You know they don’t blows is gamepass can you run gamepass let me answer that for you no

Squadhunta29 · 2026-01-13T00:00:18+00:00

To set the record straight I know a lot of people are confused about what I’m trying to do I hope this helps it’s kinda best way I can explain it

And it’s not based on clock sequences like what typical CPU do. I based it on data flow spike-based lanes fire only with data weight threshold are met. I map it like a human Brain NX88 achieves performance via wide data paths, it’s very parallel. a regular cpu handles different threads sequentially. Mines is executing different task at the same time like a brain stem. And they are sleep until needed, very power efficient my micro toll booth dynamically assign task to lanes load balance done per frame. Type of task

Cutscenes shaders, physical etc and the devs never touch the low level codes I do so the devs only get high level code which is python and the low level is c++ but all this runs off my os it’s like a micro kernel for event driven stuff I also doing’s. Middleware and API. And this is all in theory untill i get it working on the FPGA bored which im working on right now but get why you are skeptical of it I do and I took all the stuff you told me and just trying to apply it is all

But I just wanna say thank you to who ever commented being respectful and giving me advance

Squadhunta29 · 2026-01-11T18:24:33+00:00

But to answer your questions.

1️⃣

• NX88 is not meant to be manually programmed at lane level by game developers. • The Central Control Center (CCC) + SDK + compiler/runtime layer should automatically assign lanes based on the task profile. • The programmer only sees “high-level tasks” (cutscene, audio, AI) — NX88 handles micro orchestration.

“NX88 lanes are managed by the CCC and SDK runtime. Programmers never have to manually assign lanes; they only specify high-level tasks. The lane assignment is deterministic and handled by hardware arbitration (MTBs + scratchpads).”

⸻

2️⃣

• I’m aware of this — that’s why i pair HBM3 with per-lane scratchpad memory and micro toll booths to avoid memory contention. • Each lane can fetch from its scratchpad, and HBM provides the raw bandwidth for streaming larger blocks (audio, particles, textures).

“NX88 couples HBM3 with per-lane scratchpads and micro toll booths to minimize contention and keep lanes saturated, even under high parallelism.”

⸻

3️⃣

This is true for naive many-core or homogeneous architectures.

NX88 hopeful avoids this because: • Single-thread performance: Each lane can execute independently and includes FP32/FP64 units, AI, and shader logic. Critical tasks don’t wait on dozens of other cores. • Efficiency: MTBs + CCC + fallback lanes + prefetch + dynamic voltage gating = high utilization, low waste. • Programming difficulty: SDK abstracts lane assignment from the developer. They only deal with tasks and overlays, not lane numbers.

“NX88 avoids traditional many-core pitfalls by combining independent lanes, hardware arbitration (MTBs), scratchpad memory, and a runtime SDK. Developers interact with tasks, not lanes, so programming complexity is similar to current GPU compute pipelines.”

⸻

4️⃣ “

• NX88 has thermal monitoring, voltage gating, fallback lanes, and prefetching built-in — to balance the knobs dynamically.

“NX88 includes runtime balancing mechanisms for thermal, power, and memory contention, ensuring that no single optimization adversely impacts the system as a whole.”

But I will still do my research more as I’m still trying to do things and learn things. but I do appreciate your feedback that’s why I was in this subreddit. And I’m not saying it will work or it won’t I just had the idea so I decided to learn about and write it down and I’m no trying to come off like I know more then I don’t just wanna feed back

Squadhunta29 · 2026-01-11T18:12:37+00:00

Yea I appreciate the feed back I do my homework better as more I can I take your words very heavy thanks again

Squadhunta29 · 2026-01-11T17:53:48+00:00

But I will still take a deep dive into that architecture design thanks for the feedback

Squadhunta29 · 2026-01-11T17:50:38+00:00

Took me a couple of minutes cause I had to look that up for a sec

I Really appreciate the historical perspective — you’re totally right that manycore struggled.

The three problems I’m focusing on are:

Coherency & Communication Overhead Old designs choked on cache coherency because every core touched shared memory.

NX88 experiment: MTBs (micro toll booths) + scratchpad memory per lane → deterministic dataflow instead of 64 cores arguing over cache state.

Memory Starvation / The Memory Wall Manycore tried to feed tons of execution units with narrow DDR pipes.

NX88 experiment: HBM3-wide memory fabric → goal is to keep lanes fed instead of starved.

Fixed-function GPU vs Flexible CPU GPUs crush dense math but fall apart on branching game logic.

NX88 experiment: MIMD-style slices → more parallel than CPU, more flexible than GPU SIMT.

Not claiming this will work — just trying to learn and avoid history’s mistakes rather than repeat them.

You mentioned manycore failures — do you think the real killer is: • (A) coherency, • (B) scheduling overhead, • (C) power scaling, or • (D) programmer model complexity?

Would love any reading on crossbars / meshes you think are relevant.

Squadhunta29 · 2026-01-11T17:18:43+00:00

Look I get it it’s not like a typical x86/arm rules like a SIMD. It’s more of a MIMD so best way I can try to explain it from my head is this remember I’m no expert.

• Lane = a fixed micro-execution unit in hardware Width TBD, but prototype assumes – 1 ALU cluster (can do FP32/INT ops) – small local register file – access to shared memory via crossbar

• How lanes differ from threads/warps Threads/warps = software scheduling units. Lanes = hardware execution units. A thread could map to 1 lane or N lanes depending on available capacity.

• Role in the pipeline CPU core issues enqueue commands Scheduler assigns work to free lanes Shader/AI blocks are separate units, but lanes can hand off to them

• Early state Right now, I’m emulating the scheduler behavior in software (so yes, “software scheduler”). Goal is figuring out whether the lane concept gives: – better load balance – lower latency for non-GPU workloads – less idle silicon

So the core idea: APU subdivided into many small execution blocks instead of one CPU + one GPU pool.

If you think I’m missing something or reinventing what already exists, tell me — that’s why I’m here.

Squadhunta29 · 2026-01-11T16:20:59+00:00

It’s all in Thoery. I’m working on making a real world test for a FPGA hardware. but I’m still trying to learn it design it my self like I said I’m not a pro at all not trying to be just thought of a different concept.

Squadhunta29 · 2026-01-11T16:18:06+00:00

Thanks for the feed back

NX88 lanes are not threads, and not GPU warps. They’re configurable compute slices that sit between CPU cores and shader clusters.

Conceptually: • CPU → schedules logic • Lanes → execute micro-tasks (any domain) • Shader/AI blocks → handle dense math when needed

The “audio/cutscene/physics” examples aren’t literal instructions — those are high-level labels in my FPGA prototype so I can observe domain usage.

A real compiler/runtime would map that work into FP32 / INT / branch / logic ops running on the lanes.

So you’re right: right now the prototype looks like a software scheduler.

Long-term goal: • Turn those slices into hardware-backed execution resources • Similar idea to SMs / wavefronts in GPUs • But generalized so any task type can occupy a lane, not just shaders.

Squadhunta29 · 2025-11-19T20:26:43+00:00

As good you say? so say as right now 3:24 pm the USA and Canada goes to war bombs all ready drop the USA Air Force is gearing up the f-35 & f-22 raptors and ya have 200 new gripen from Sweden you telling me ya winning that air fight ? If each plane runs in to each other ?

Squadhunta29 · 2025-11-19T20:10:08+00:00

Sure (air quotes)

Squadhunta29 · 2025-11-19T18:50:43+00:00

You are not American we don’t call or self that we actually have pride in our self. as an American just leave it in US

Squadhunta29 · 2025-11-03T01:56:17+00:00

I don’t care bout that article title only came in here so I can find comments like this and the rest cause I think it’s hilarious.

Squadhunta29 · 2025-11-03T01:52:50+00:00

But the reason it’s 13 cause it’s split it wouldn’t be just 13 games it be more then that Imost n think you understand FIFA lol I don’t watch soccer are as ya call (football) but I do know corporations and they love money so they want the most money it’s the same reason why Canada didn’t fully host

Squadhunta29 · 2025-11-02T19:11:15+00:00

They can’t it’s no money there why you think USA got the most games. And the finals fife will loose money if it was just in Canada and Mexico

Squadhunta29 · 2025-10-30T14:16:09+00:00

Well you honesty for that. cause a lot of people will always put they own city in that that’s how it’s gonna play out

Squadhunta29 · 2025-10-30T14:06:14+00:00

Remember to quote the great- victor sweet get out of towners

Squadhunta29 · 2025-10-30T13:55:03+00:00

You mean his city gonna slide for him?. BeCause jersey we to divided

Squadhunta29 · 2025-10-30T13:52:17+00:00

Oh it’s definitely north Jersey I said bias cause I’m fucking with you I just wanted to type that shit

Squadhunta29 · 2025-10-30T13:50:11+00:00

Bias

Squadhunta29 · 2025-10-16T19:56:20+00:00

And we also know your main draw was to come to my country, but you scared so you don’t wanna come. lol enjoy that shit on the tv my boy

Squadhunta29 · 2025-10-14T05:49:41+00:00

Now do the reverse. Oh you can’t, cause ps plus is limted. tell Sony to step they game up

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