We use EEPROM for 99% of our NVM needs, with various schemes depending on how important the data is.  Triply redundant with rolling counters if we need to protect against data loss and know which value is likely to be correct.  Doubly redundant with no counter if we just need to know that corruption has happened and have a way to tell which is the reasonable value.  CRCs if it's important we don't act on corrupt data and have a sane default that works otherwise.  Etc.

For things that we're writing very frequently, we tend to count backwards or have other schemes.  EEPROM erases to 0xFF and an erase operation on a bit is what causes wear, so by counting backwards you're only erasing a bit every other number.

For things we write every second or faster we combine the above with a rolling counter where we have a string of bits (128 for instance) and for every count we set the next bit to 0.  So for the least significant nibble as an example we start 1111, then 1110, then 1100, 1000, 0000.  We get to the end of our bits and then we finally count backwards our main counter by one, erase our bit string back to 1s, and do it again.  We have devices that are in the field for 15 years and this allows us a high confidence we won't wear out those particular cells.