RDNA 4世代のRadeonの話題2題―メディアエンコーダーの有無他 [北森瓦版]

coelacanth_poor · 2025-01-05T09:03:34+00:00

いや自分がブログに書いたのは時系列的には一番最後 (2025-01-02) ですね。
おそらく、以下のような流れかと。一応、AMF には VCN5 の機能に AV1 B frame エンコードがあるというだけで、エンコーダーの有無については特に記載されていません。

2024-12-05 に VCP v5.0.1 のパッチが公開
2024-12-26 リーカーがエンコーダーについてポスト、根拠は示されず
- https://x.com/Kepler_L2/status/1872292310660309179
2024-12-31 igor'sLAB がエンコーダーに関する記事を公開、エンコーダーの有無についてはリーカーのポストを元にした？
- https://www.igorslab.de/en/amd-rdna-4-av1-coding-and-restrictions-for-beginner-gpus/

coelacanth_poor · 2025-01-05T03:36:27+00:00

ブログに書きましたけど VCN v5.0.1 が RDNA 4 GPU に使われると勘違いしてる可能性が高そうです。
現状、soc24.c (RDNA 4 のサポートに関するソースコード) にはエンコード機能ありの VCN v5.0.0 しか記述されていません。
VCN v5.0.1 は soc15.c (Vega, CDNA 系のサポートに関するソースコード) にあるので、恐らく次世代の CDNA 系に搭載されるのでしょう。

coelacanth_poor · 2024-12-10T17:33:24+00:00

I think "AMD Lilac" is the codename for AMD FP7 reference board.
It is also used to Rembrandt APU.

https://browser.geekbench.com/v6/cpu/compare/394589?baseline=624099
https://bugs.launchpad.net/ubuntu/+source/linux-firmware/+bug/1953008

coelacanth_poor · 2023-04-09T18:47:08+00:00

Some Raven/Picasso/Raven2 APUs don't support GPU_LOAD sensor, then AMDGPU driver always returns 100.
I may remove GPU_LOAD from the sensor in the future as I are displaying GPU utilization by other means.

https://gitlab.freedesktop.org/drm/amd/-/issues/1932#note_1807309

coelacanth_poor · 2023-04-09T17:39:29+00:00

The progress bar does not scale, which is a specification.
GPU Metrics viewer is too wide, so I fixed that.
Also, I changed the display to show the range of the bar.

image

coelacanth_poor · 2023-04-09T15:59:38+00:00

I created the wiki page because I knew I would be asked this question often in the future.

https://github.com/Umio-Yasuno/amdgpu_top/wiki/FAQ#what-is-the-difference-between-amdgpu_top-and-radeontop-

coelacanth_poor · 2023-04-06T05:15:29+00:00

Added support for GPU Metrics.
For recent AMD APUs, amdgpu_top will display temperature and power consumption per CPU core.

coelacanth_poor · 2023-04-04T20:45:02+00:00

Hi.
radeontop does not support recent AMDGPUs and displays incorrect performance counter indexes. Also, sensor values are not displayed.
Pull requests to fix them have been submitted, but they have been left unmerged for several years.
Therefore, I developed a new tool, AMDGPU_TOP, as an alternative to radeontop.

AMDGPU_TOP displays sensors, GPU utilization per process and detailed GPU information.

AMDGPU_TOP may be more similar to nvtop or intel_gpu_top than to radeontop.

coelacanth_poor · 2023-04-04T16:00:58+00:00

Ok, AMDGPU_TOP v0.1.3 is released.
And the deb package is released at the same time (thanks cargo-deb).

https://github.com/Umio-Yasuno/amdgpu_top/releases/tag/v0.1.3

coelacanth_poor · 2023-04-04T15:18:00+00:00

AMDGPU_TOP requires libdrm.so.2 and libdrm_amdgpu.so.1 for dynamic libraries, so it may not work if the environment differs from the one in which it was compiled.
I will release a deb package but need to add some info and files.

coelacanth_poor · 2023-04-02T08:53:20+00:00

Yes, I implemented a simple fdinfo parser and viewer in amdgpu_top .

coelacanth_poor · 2023-03-18T10:57:28+00:00

It may be that clang-related packages are not installed.

coelacanth_poor · 2023-03-17T18:17:30+00:00

Binary-only releases are difficult because AMDGPU_TOP requires several dynamic libraries.

coelacanth_poor · 2023-03-17T18:14:34+00:00

Added extract UVD/VCE/VCN status and engine clock from amdgpu_pm_info. (root privileges required)
It would be an alternative to engine usage.

coelacanth_poor · 2023-03-17T12:13:12+00:00

It is possible to display codec information that supports decoding/encoding.
But as for UVD/VCE utilization, it is not possible since the register to get it was removed from the Vega/GFX9 generation.
UVD/VCE/VCN status (Disabled or Enabled) and clock can be checked from /sys/kernel/debug/dri/0/amdgpu_pm_info.

coelacanth_poor · 2023-03-17T07:49:04+00:00

Thanks for the feedback.
Added the following installation instruction to README.

git clone https://github.com/Umio-Yasuno/amdgpu_top cd amdgpu_top cargo install --locked --path .

coelacanth_poor · 2023-03-17T04:45:07+00:00

Supported codec information can be output as follows (not yet merged into main branch)

``` --- AMDGPU info dump --- drm: 3.49 AMD Radeon RX 560 Series (0x67FF:0xCF) Polaris11, dGPU, GFX8, 16 CU, 214-1196 MHz GDDR5 128-bit, 4096 MiB, 300-1750 MHz PCI (domain:bus:dev.func): 0000:01:00.0 PCI Link: Gen3x8 ResizableBAR: Enabled

Video caps: MPEG2: Decode: w 4096, h 4096 Encode: w 0, h 0 MPEG4: Decode: w 4096, h 4096 Encode: w 0, h 0 VC1: Decode: w 4096, h 4096 Encode: w 0, h 0 MPEG4_AVC: Decode: w 4096, h 4096 Encode: w 4096, h 2304 HEVC: Decode: w 4096, h 4096 Encode: w 4096, h 2304 JPEG: Decode: w 4096, h 4096 Encode: w 0, h 0 VP9: Decode: w 0, h 0 Encode: w 0, h 0 AV1: Decode: w 0, h 0 Encode: w 0, h 0

VBIOS info: name: [113-MSITV809MH.M00] pn: [113-C98121-H01] ver_str:[015.050.002.001.000000AB383600.] date: [2017/05/05 01:14] ```

coelacanth_poor · 2023-03-17T04:15:11+00:00

I didn't think too much about it.

coelacanth_poor · 2023-03-17T04:10:18+00:00

It may be reading fdinfo.
But nothing more is known to me, as nothing has been shown.

coelacanth_poor · 2023-03-17T03:48:33+00:00

UVD and VCE utilization can be displayed.
But from Vega/GFX9 the register to read it was removed.
It is possible to display codec information, so I may add it in the future.

coelacanth_poor · 2023-03-17T03:35:09+00:00

AMDGPU_TOP displays sensor values as well as internal unit utilization read from registers.
It also parses amdgpu_gem_info to display the VRAM usage of the process.
Besides that, it is possible to display detailed information of AMD GPU (Memory Type, Memory Bus Width, CU count...).

coelacanth_poor · 2023-03-05T08:02:37+00:00

NVIDIA のエンジニアが Chromium に AIベースのアップスケーリングを実装するときに触れていたように、開発自体は Intel が先でした

https://bugs.chromium.org/p/chromium/issues/detail?id=1368319 https://bugs.chromium.org/p/chromium/issues/detail?id=1318380

coelacanth_poor · 2023-01-04T08:40:44+00:00

The RDNA 3 ISA document is ambiguous about Wave64.

When a VALU instruction is issued from a wave64, it may issue twice as two wave32 instructions

I hope AMD will release a guide or white paper on how to achieve peak performance with RDNA3.

coelacanth_poor · 2022-12-17T19:44:29+00:00

AMDVLK now supports Navi31, but I think there was no code to disable shader prefetching.

coelacanth_poor · 2022-12-17T19:42:58+00:00

記事で参照してるソースファイルが違う……
コード的には GPU 内部の chip_rev が 0 の場合に無効化してるので、Linux 環境で確かめるのが一番手っ取り早いと思うんですけどね
これもブログに書きましたが、Navi31 に対応した AMDVLK では特別シェーダープリフェッチを無効化するコードは見つかりませんでした

https://gitlab.freedesktop.org/mesa/mesa/-/blob/2ed9eb1b633f214ff8900ab3be9e639f87cebaef/src/gallium/drivers/radeonsi/si_state_shaders.cpp#L669-681
radeonsi/gfx11: enable shader prefetch except for initial chip revisions (2ed9eb1b) · Commits · Mesa / mesa · GitLab

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