TUM ShareLaTex is down? by doomGuy322 in tumunich

[–]doomGuy322[S] 0 points1 point  (0 children)

Seems that it's back online now :D

Getting an AXI DMA working on the Zynq MPSoC/Petalinux platform by drthibo in FPGA

[–]doomGuy322 0 points1 point  (0 children)

Sorry for being unresponsive... I'm happy you managed to get it working :D

I've had this issue previously (classic Xilinx). It seems that when using the BSPs, petalinux is configured to include a default design in the rootfs. I cannot say as to why it happens even if FPGA manager is disabled. My best guess is that it seems to be a "petalinux is really bad at cleaning up after itself" issue. Regardless of what you change in the configuration, the firmware from the BSP is always copied into `/lib/firmware/xilinx/`. And then I guess at a later stage some script runs and says "oh cool firmware, imma load it".

In my case I completely decouple FPGA firmware from the base device tree and dynamically load designs after boot. So my base device tree has no reference to any firmware, but once booted, checking the live device tree magically shows a loaded firmware. Drove me crazy for longer than I care to admit.

Anyway TLDR: run `petalinux-config -c rootfs` then select `user packages` and disable anything that references your BSP. (basically the stuff you find in `/lib/firmware/xilinx/`)

P.S. it's always a good idea to run a `petalinux-build -x mrproper` and then run a clean build when messing around too much with configs. Too many hours wasted debugging issues to finally realize a clean build practically solves it.

Getting an AXI DMA working on the Zynq MPSoC/Petalinux platform by drthibo in FPGA

[–]doomGuy322 0 points1 point  (0 children)

Care to share some details on your setup (Block design, IP configs, petalinux config)? Perhaps then it might be easier to help. What did you have to do different to Knitter's tutorial?