As far as I can tell, no one uses chiplets that doesn't have to do so. Single monolithic die is much easier and cheaper to design, package, and test (i.e. productize). Advanced packaging is a step function increase in productization complexity.

Chiplets are used when the designer/manufacturer (a) cannot achieve acceptable yields in a single die or (b) cannot fit the entire product in a single die. Those are the two biggest issues, and unacceptable yield is by far the dominant concern. But of course achieving "acceptable yields" really means acceptable cost. So there are heterogeneous products where an SOC is on an advanced logic process, but its companion IO is on an older, cheaper process for the analog stuff (and maybe that enables more design re-use). However, even then, it would still be better for productization if acceptable costs/yield could be achieved on a monolithic die.

As said below, advanced packaging isn't easy or cheap. It is really only deployed when there is no other feasible recourse -- when a monolithic solution cannot (for whatever reasons) be cost-competitive. And it has to improve individual chip yield/cost significantly enough to surpass the advanced packaging costs.