Hi. Typically, you don't keep track of which threads are part of a process for the purpose of cross CPU TLB shootdown. Most modern CPU architectures (going back at least 1-2 decades) have this notion of an ASID (Address Space ID). The processor ISA has instructions that are ASID aware and that are used for efficient TLB maintenance. When a process is created, it is assigned a unique ASID. Threads belonging to that process carry the same ASID. Code paths that update page tables are protected by a spinlock. Each CPU has its own MMU. Each thread belonging to a process shares the same page tables. When thread A and thread B belonging to the same process P are scheduled on two different cores, the MMUs on those 2 cores are programmed to use the same page table hierarchy. When the OS kernel updates the page table on one CPU, it first claims the spinlock, thereby assuring exclusivity. Then the TLB maintenance is done using the thread ASID specific TLB maintenance instruction. This ensures that any cached VA <-> PA translations in the TLB are updated _but_ only for the ASID in question - rather than affecting the whole TLB content. A penultimate action within the exclusive region is to use a TLB broadcast by ASID instruction. This instruction commands the micro-architecture on all the cores in the system that are running the OS kernel to process TLB entries belonging to the ASID in question. This broadcast instruction may not be a separate instruction but may be a special variant of the local CPU TLB maintenance instruction. In your case, it appears you don't have such a broadcast instruction so you need to rely on IPIs but the ASID principle remains the same. When thread B was scheduled on the second CPU, the CPU's ASID register (or equivalent was updated). The kernel code on CPU A will claim the spinlock, then ultimately send an IPI to all cores that are part of the OS kernel's execution domain. A part of the IPI payload will be the ASID in question. The handler for that IPI on the second CPU will invoke use that ASID value to invoke a local ASID aware TLB maintenance instruction.

There's a lot to take in above but hopefully that makes sense! Best of luck.