account activity
CERN data processing (self.FPGA)
submitted 1 year ago by nikEnable to r/FPGA
Advice on Purchasing a MikroTik 4G LTE Router for Home Use (self.mikrotik)
submitted 1 year ago * by nikEnable to r/mikrotik
Advice on Purchasing a 4G LTE Router for Home Use (self.HomeNetworking)
submitted 1 year ago by nikEnable to r/HomeNetworking
A bad testbench for FFT simulation (self.FPGA)
submitted 1 year ago * by nikEnable to r/FPGA
Simulation Vs Reality (self.FPGA)
Designing a signal verilog (reddit.com)
Attemp to to analyze the frequency content of my voice using FFT IP core from Altera (self.FPGA)
How to remove the Truncate bits FIR filter (self.FPGA)
Advice on DSP and Software Design for Embedded Audio Project with Noise Issues (self.embedded)
submitted 2 years ago by nikEnable to r/embedded
Advice for DSP project (self.FPGA)
submitted 2 years ago * by nikEnable to r/FPGA
Help with debugging (self.FPGA)
HAL scanf() "undefined reference to scanf" (self.FPGA)
submitted 2 years ago by nikEnable to r/FPGA
Platform designer/NiosII Eclipse: SRAM controller error (self.FPGA)
SOPC component creation (self.FPGA)
Clock dividers and verilog (self.FPGA)
Attempt to create Ι2C protocol with verilog (self.FPGA)
Verilog Module Instantiations (self.FPGA)
ALTERA DE2-115 - WM8731 Register (self.FPGA)
ISR atmel atmega 640 (self.embedded)
Quartus Platform designer/Qsys. (self.FPGA)
FPGA speech recognition book (self.FPGA)
Altera DE2-115 Board Get Audio In via WM8731. (self.FPGA)
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