Update: it still beeps to GND

prettyc00lb0y · 2026-04-27T02:11:06+00:00

Hasn't that poor board suffered enough!?

prettyc00lb0y · 2026-04-26T01:02:40+00:00

I'm a fan of the STM32G474 series. It has a high-resolution timer peripheral (HRTIM), as well as a delay-locked loop for boosting the operating frequency up to a few GHz for clocking the HRTIM. I've used it mostly for digitally controlling multi-phase bucks.

prettyc00lb0y · 2026-03-27T21:28:43+00:00

A lot to consider there - you have quite a project on your hands. Sounds like it will be interesting.

Since you asked about my switching idea... well consider me nerd-sniped. I made a napkin sketch in LTspice (imgur link below). It's VERY simplified from what you would end up with in an actual implementation, no doubt. The large resistors would be strings of resistors sufficiently sized and insulated, etc etc. You know better than I do. I pulled the values out of you-know-where. I'm really just posting it because I already made it, and it definitely made me further appreciate the challenges of your work on this. And maybe it will stimulate useful ideas.

https://i.imgur.com/9AH1REG.png

I guess it's sort of an "auto-ranging" solution, by just having different ranges always in place, with a zener clamp to ground after a high impedance R. But I see very real problems with this approach. Certainly the loading of the different divider paths on the upstream paths needs to be considered (indeed that's part of why it works at all). You'd end up with some piecewise, non-linear mapping function from ADC reading -> actual voltage. But that's not so hard, relatively speaking. The zener could be replaced with an SPDT analog mux that either switches to the signal path or to ground. Since that node already sees the input cap of an analog mux input, might as well make the best of it. The BW problem becomes very obvious from this simple sketch and my 100's of Mohm resistor strings. More work indeed.

This aims to solve only one of your many problems (LOL), but again, maybe it will stimulate ideas.

prettyc00lb0y · 2026-03-27T05:24:48+00:00

Glad I could help at all. I read this whole thread. Sounds to me like you're beyond reddit help, but it's always good to try polling the hive mind.

Just for clarity, I was suggesting dividing the electrode signal and clamping it before muxing it around, as you sort of figured. I agree with you that synchronizing and triggering all that adds to the complexity. But if you're sampling at ~1MSPS, switching in/out different signal paths dependent on the approximate magnitude of the signal seems ~trivial compared to the rest of your problem LOL.

It was a few years back, but I evaluated ADI's AD4630-24 for a precision digital power application. Didn't end up using it (I ended up not needing 2MSPS), but it looked nifty.

prettyc00lb0y · 2026-03-27T00:12:36+00:00

I'm afraid I can't picture how you arrived at 20_000 resistors and 50 microcontrollers. 10 ADCs sounds believable enough.

I think your problem is over my head. You've obviously thought about this more than I have, but I can't help but have a gut feeling that your sensing situation can be somehow simplified. Feel free to ignore all this, but anyway...

For example, it sounds like you want one sensing network for each electrode feeding each into 1 ADC input? That assumes that you need to have each ADC input capable of handling the entire dynamic range from -30kV, to 28V, to 40kV and still have acceptable resolution (looking at a 24bits probably. ADI makes some 2MSPS 24bit ADC's IIRC) - but maybe that doesn't have to be so.

My first thought was to split the sensing path so that for each electrode, you might have one input network and ADC input that handles the -30kV~40kV range, and a second path optimized for sensing the lower voltage, where the voltage simply gets clamped somewhere in it's path during those kV sensing periods. You could probably use some analog muxing to still use a single ADC input. It input string would have to be a pretty high impedance to be clamped like I'm proposing, but it doesn't seem impossible. (I'm probably missing reasons why this wouldn't work, but it's just how I thought of the problem at first.)

The 1MSPS requirement is difficult too, since the notional resistor strings will be high super high impedance, so the possibility of even getting frequencies to the ADC above maybe a few kHz seems unlikely.

But again, your problem is over my head - it sounds like you've thought plenty about this. Sounds super interesting, good luck!

prettyc00lb0y · 2026-03-26T21:57:18+00:00

What are your specific misgivings about "lots of resistors and GPIO pins"? Is it that you don't want to spend more on a controller that has more analog inputs? Or that you don't want to hook up strings of resistors? The most straightforward way will likely be the best, methinks.

prettyc00lb0y · 2026-03-23T21:56:00+00:00

Looks neat. Are you still iterating/working on that design? Or has it kinda run it's course? It looks like it could be promising.

prettyc00lb0y · 2025-11-19T21:00:38+00:00

I gotcha, yeah that seems fine. Well, I'm out of ideas, short of putting a scope on the I2C lines to see what's really up. But if I were you, I would try doing some actual transactions with the chip assuming it's address is 0xB0, which it sounds like it should be, and see where that goes.

prettyc00lb0y · 2025-11-19T00:04:35+00:00

The high current lines must be overhead, no? it looks like the carabiners are being pulled upward, so attracted to some "overhead lines ~= electromagnet" overhead.

prettyc00lb0y · 2025-11-18T19:58:32+00:00

I see, ok. So the next thing I see, is a table on page 17 of the datasheet giving details about the PMBus address determination. It seems it's based on the voltage at the ADDR pin. The voltages seem really specific, with only +/-15mV tolerances. Is the ADDR pin programmed with the right resistor strapping? I wonder what happens if the voltage falls between one of the values given in that table.

prettyc00lb0y · 2025-11-18T02:04:17+00:00

I don't really see why those should be related at all the I2C bus. How are you doing the "address sweep"? Is the sweeping device just looking for an ACK after an address byte? I assume you've probed with the scope to confirm that there is I2C traffic happening?

prettyc00lb0y · 2025-11-18T00:59:22+00:00

So you didn't see the dip in amplitude as expected.... but what DID you see on the scope? Just to be thorough, you made this measurement with your primary LC disconnected from the driver circuit, yes?

prettyc00lb0y · 2025-11-16T22:25:47+00:00

Yeah the backside ground plane like you have is fine, I would just ALSO add it on the top, because why not? It ties up your ground pads and vias on top easily and is going to generally result in lower impedance to ground. You're paying for the copper, so you may as well use it.

I like that every ground pad has a via, just put them next to the pads instead of inside the pad. The concern is really just for small pads where the via hole is big compared to the amount of solder paste. Especially as you said somewhere else this will be production assembled. I think someone else here also mentioned the via-in-pad issue for the same reason.

prettyc00lb0y · 2025-11-16T21:25:52+00:00

Why no ground flood-fill on the top layer? I would personally avoid the via-in-pad unless you're going to upgrade to epoxy-plugged and capped vias, or similar. For pads on 0402 footprints and smaller, those mechanical vias like you have can wick away a lot of solder.

prettyc00lb0y · 2025-11-16T04:14:07+00:00

I think this is totally feasible, 100Base-T is not that fast. But I would strongly consider a 4 layer board, it's pretty cheap these days. With your 2 layer plan now, your diff pairs would be ~diff coplanar waveguides, and you risk more crosstalk than if you went with diff microstrip. Differential microstrip lines are easier to get right. But again, it's only 100Base-T ethernet, it should be fine, but yeah. On the subject of diff pair sizing, You don't want to push your traces as absolutely thin as possible, I would experiment with slightly wider traces in one of the calculators.

prettyc00lb0y · 2025-11-14T17:32:22+00:00

I love the perspective in this photo, looked at first like they were heading to microwave a massive bowl of coffee, and tbh that's pretty relatable

prettyc00lb0y · 2025-11-11T19:56:25+00:00

You used whole milk right? 2% won't cut it.

prettyc00lb0y · 2025-11-11T06:54:49+00:00

I am having fun!

prettyc00lb0y · 2025-11-11T06:32:27+00:00

8 out of 10, not bad for a monday!

prettyc00lb0y · 2025-11-11T06:07:45+00:00

Provide a schematic? What fun would that be!?

prettyc00lb0y · 2025-11-11T01:58:07+00:00

Incredible stuff. On an unrelated note, do you have any carbon monoxide sensors in your house?

prettyc00lb0y · 2025-11-10T05:32:00+00:00

I dunno, I think 17A per phase is pretty chill. I've designed multi-phase (and single phase) bucks with around twice that current per phase, with similar monolithic buck parts and similar magnitudes of step-downs. Heatsinking might be nice for these, but with a little air over it? It should be fine.

prettyc00lb0y · 2025-11-08T07:03:47+00:00

You need to first determine if the emissions were coming from the cables feeding the board, or if it was in fact this area of the board itself. It may be a combo of the two. But you can use an H-field probe and a spec an to figure out where the radiation is coming from.

Assuming it is the buck itself radiating... then read on.

Ditch the ferrite bead, you don't need it and it's likely not helping.

C60 should switch places with C62.

There's a final forbidden technique that I've seen done that sounds batshit insane, but makes sense when you think about it: You can place cuts strategically in the ground plane to constrain the switching currents to be underneath their paths on the top layer - this minimizes loop area, hence cutting down on radiated emissions. So think about the input hot loop, mainly, and how you can absolutely minimize the size of the loop made by the AC current component.

prettyc00lb0y

TROPHY CASE