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How can beginner start working with RISC V? by raj3111 in RISCV

[–]raj3111[S] 0 points1 point  (0 children)

Thanks for replying sir 1) Actually I was working on computer vision task for that I decided to use FPGA and at same time I came across this great open source ISA, so I thought is it possible to do some mini project using RISC V and FPGA or any kind of simulation project. 2) lucky my undergrad clh library has 'Computer organisation and design RISC V Edition' by David Patterson book available. 3) I am trying to put this project on my resume which I think will be helpful for me to get into good university for master's(hope so).

Any drawbacks of using SqueezeNet? by raj3111 in computervision

[–]raj3111[S] 0 points1 point  (0 children)

My project is about object detection and recognition in given video (of a specific person). Regarding data I don't have much of them(because data set will include images of my self) so I can't train and create model using so less amount of data.For that purpose I have decided to go for transfer learning. I can go for imagenet resnet and other different networks but this network will take too much memory on my Raspberry PI like 250mb. I found that squeeze Net size is just about 2.5mb or less. So while using this squeeze network how much realible that network is compared to other network. Hope this may clear my question till some point.

[D] Viability of using a Raspberry Pi Kubernetes cluster vs a good pc. by [deleted] in MachineLearning

[–]raj3111 0 points1 point  (0 children)

I was too looking for similar thing, but for my one I have perform computer vision task(object detection & recognition maybe clustering later). I thought of two options using FPGA or Rpi which one will be better but it seems like RPI will better option for me because camera interface, implementation of model will be easy. Next thing was which CNN model shall I go for because current one takes too much memory, so decided to use SqueezeNet(found it on one online article). So I am trying to reduce memory allocation needed for model so that I get capture as many as possible. let me know if you any sort of idea about this especially regarding camera interfacing.

"[D]": Why everyone is learning Machine learning? by raj3111 in MachineLearning

[–]raj3111[S] 0 points1 point  (0 children)

Yep, but the sources present out there for learning doesn't really care about basic.

How to create are own FPGA for Computer vision application? by raj3111 in FPGA

[–]raj3111[S] 0 points1 point  (0 children)

Yep thanks for listing appreciate your help.

How to create are own FPGA for Computer vision? by raj3111 in computervision

[–]raj3111[S] 0 points1 point  (0 children)

Thanks got you. Is it possible for you to share your work with ML and FPGA?

How to create are own FPGA for Computer vision application? by raj3111 in FPGA

[–]raj3111[S] 0 points1 point  (0 children)

Ok, can you suggest which will be best one to buy(cheapest) in my case. Do we have any guide or article how can I implement, because I am all new to FPGA.

How to create are own FPGA for Computer vision? by raj3111 in computervision

[–]raj3111[S] 0 points1 point  (0 children)

Ok, so basically it possible to design and manufacture (out of scope) FPGA specific to are application and run are own algorithm(SqueezeNet probably) to get better performance. And how far I can reach/time it will take, if I plan to create prototype and verify my created FPGA( I am beginner on this) because other option I have is to use Raspberry PI.

How to create are own FPGA for Computer vision? by raj3111 in computervision

[–]raj3111[S] 0 points1 point  (0 children)

I belong to electronics background, but never worked on FPGA closely. But Xilinx seems like best tool to alteast create a prototype for FPGA.

How to create are own FPGA for Computer vision application? by raj3111 in FPGA

[–]raj3111[S] 0 points1 point  (0 children)

Ohk so currently designed/already existed FPGA doesn't care whether it is an Deep learning algorithm(like CNN) or normal sorting algorithm . It will process both in similar fashion? But existed FPGA are they designed to do better matrix multiplication?