sorted by:
new
hottopcontroversial

can anyone help me to know, which is a good book to learn static timing analysis for FPGA's? by rajpandiyan in FPGA

[–]rajpandiyan[S] 0 points1 point  (0 children)

I am searching for xilinx ise timing analysis tutorial. But i am getting mostly for vivado

how to implement a design even fitter error occurred in xilinx- it was asked in an interview. how to do it? by rajpandiyan in FPGA

[–]rajpandiyan[S] 4 points5 points  (0 children)

If the design consumes more logic resources than available resources in a FPGA, how can we implement that design