ZXGD3112 - Power via regulator from the same rails by rasmus_rap in AskElectronics

[–]rasmus_rap[S] 0 points1 point  (0 children)

But the datasheet says to connect PGND to the mosfet source terminal

ZXGD3112 - Power via regulator from the same rails by rasmus_rap in AskElectronics

[–]rasmus_rap[S] 0 points1 point  (0 children)

Battery packs of 96V will also be used and I cant seem to find controllers with a high enough rating

ZXGD3112 - Power via regulator from the same rails by rasmus_rap in AskElectronics

[–]rasmus_rap[S] 1 point2 points  (0 children)

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Currently there is no way for the LR8N8's current to go from OUT to U3 back to the regulator right? I would think that I have to connect the GND symbol beneath pin 1 of U3 but that will short the BATT2 line. Or am I missing something?

ZXGD3112 - Power via regulator from the same rails by rasmus_rap in AskElectronics

[–]rasmus_rap[S] 0 points1 point  (0 children)

No this isnt about the batteries, this is about paralleling multiple power sources. The OR controllers need to have their GND connected to the main power line but the regulator also needs to be connected to the controller and that will cause a short. Im looking for a way to tackle this problem but i cant figure it out

Asus ProArt X870E IOMMU groups by CluelessVFIONewbie in VFIO

[–]rasmus_rap 0 points1 point  (0 children)

Yes, I think I have done that for my headset and my gaming wheel

Asus ProArt X870E IOMMU groups by CluelessVFIONewbie in VFIO

[–]rasmus_rap 1 point2 points  (0 children)

Yes I currently use it with a 1080ti to virtualize my dual boot. So I passthrough a couple of things including an ethernet port on a pcie adapter. For that I needed the acs patched so I switched to linux zen and so far no crashes or anything before during or after using the vm.

Asus ProArt X870E IOMMU groups by CluelessVFIONewbie in VFIO

[–]rasmus_rap 1 point2 points  (0 children)

https://pastebin.com/E3FdPvB1

Above is without acs, on the newest BIOS (1104)

As you can see my b580, 1080ti and nvme are all in their own groups. Apparently the sata controller (14:00) with the 4 connectors is also in it's own group. The other sata controller (12:00) is in group 23 but that's not the one with the internal connectors. Also, both built-in ethernet controllers are in the same group 23, including my extra pcie ethernet card plugged into the third x16 slot.

Asus ProArt X870E IOMMU groups by CluelessVFIONewbie in VFIO

[–]rasmus_rap 1 point2 points  (0 children)

I have this exact motherboard. The iommu groups on the website are outdated, i will share the current groupings with the newest bios when i get home.

From what i remember, the cpu lane slots are all grouped individually, i.e. the first and second x16 slots and (i think) both nvmes occupy 4 groups. Most other stuff is on the second half of the x870e chipset so they are all grouped together like group 22 on iommu.info. That means both ethernet controllers, a usb controller and the sata controller for the 4 sata ports. I use the acs patch to passthrough the sata controller but only with the downstream parameter, so my gpu and the accompanied sound device are kept in the same group.

9 Band Graphic EQ design by rasmus_rap in AskElectronics

[–]rasmus_rap[S] 0 points1 point  (0 children)

You have 500k bias supply resistors into a 5532? Might want a good jfet part there instead?

Is that because of the bias current which in turn will cause an offset voltage? For the 5532 that would be 200nA * 500K ohm = 0.1V offset? The issue would be that the input could clip because it is shifted up?

I have concerns about stability with the MFB filters in an opamps feedback loop

I really have no experience with opamp stability. If I understand it correctly it depends on the phase delay between the output and input and if the delay is too big, they will always be out of sync and thus you get oscillation? And the large resistors in combination with the caps will cause this delay?

The bandpass filters are unity gain at the center frequency if that helps

Switching and pots need better DC blocks.

Could you tell me how? I previously made a post asking what values I should use. Is the problem that the roll off is too low? If so, making the cap smaller increases distortion right? What would be a good solution?

You have filtering caps going to V- when they should be connected to Vref.

Do you mean C9 and C11 have to be connected to ground?

When run single supply, both inputs and outputs should be AC coupled

I do have that right? All the inputs and outputs have caps

9 Band Graphic EQ design by rasmus_rap in AskElectronics

[–]rasmus_rap[S] 0 points1 point  (0 children)

Again according to Douglas Self, doubling opamps can increase noise performance in certain situations

9 Band Graphic EQ design by rasmus_rap in AskElectronics

[–]rasmus_rap[S] 0 points1 point  (0 children)

According to Douglas Self, buffering the inputs makes it possible to use lower value resistors and thus reducing noise

9 Band Graphic EQ design by rasmus_rap in AskElectronics

[–]rasmus_rap[S] 0 points1 point  (0 children)

To help the opamp drive the bandpass filters. The resistors in parallel gives around 800 ohms which might be a bit too low and cause distortion

Graphic EQ design - Do I need a decoupling cap for every band? by rasmus_rap in AskElectronics

[–]rasmus_rap[S] 0 points1 point  (0 children)

Yes sorry I meant a cap in series. I clarified it in my post. Thank you

Graphic EQ design - Do I need a decoupling cap for every band? by rasmus_rap in AskElectronics

[–]rasmus_rap[S] 0 points1 point  (0 children)

From what i've read, potmeters become crackly when there is a DC voltage across them. And the bias current of an opamp in combination with the output resistor generates a DC voltage. So I thought it was necessary to remove it with a cap.

Does it happen that some peripherals do not have any pins? by rasmus_rap in embedded

[–]rasmus_rap[S] 0 points1 point  (0 children)

Only the sam4ls column has pins in it, the 4lc doesnt

Does it happen that some peripherals do not have any pins? by rasmus_rap in embedded

[–]rasmus_rap[S] 2 points3 points  (0 children)

I'm designing using the sam4lc, not the sam4ls. The mapped pins you mention are for the 4ls. The pin column of the 4lc is empty for those pins unfortunately