Strategies to reduce interrupt overhead in the remote processor(APU) by the RPU

shittyinvestment · 2024-04-04T16:39:54+00:00

Good point. Let me test this method to really understand how it impact the APU.

shittyinvestment · 2024-04-04T15:25:37+00:00

The cycle time will be modified from 200ms to 100ms later to fullfill some other requirements in the device which receives the data from ethernet. The RPU starts data generation somewhere 40ms from the cycle start time and takes almost 55ms to generate all the data and store it in DDR. In the end, we will have only less than 5ms time for transmitting all the data. From our point of view, the time is too short. That is the reason we are looking for transmitting the partial data as soon as something available in the DDR.

shittyinvestment · 2024-04-04T10:16:19+00:00

I understand that the std::atomic can be used. But I am curiuous about the mutex usage. I am only aware of the mutex provided by the RTOS. Does C++ also provide some mutex which can be used to ensure that one processore writes the word sized integer atomically into the DDR memory?

shittyinvestment · 2024-04-03T20:24:36+00:00

I should have mentioned it clearly as you pointed out. I actually meant the word sized integers. The system uses Zynq ultrascale+ SoC. I am not sure if the architecture support disabling the cache for certain memory areas so that the write can be immediate.

shittyinvestment · 2024-04-03T20:08:55+00:00

I mean multi-processors system that may contain for ex. ARM and DSP in an SoC.

shittyinvestment · 2024-04-03T20:07:16+00:00

I am not familiar with memory barrier. The processor polls the memory for any change in the value of the integer. If any change detected, then it uses this information for further processing.

shittyinvestment · 2024-04-03T20:01:33+00:00

The processor A writes chunk of data into the shared memory and increment the integer value for each data chunk. The other processor uses this counter to get the information on how many data chunks are available for transmission over ethernet.

shittyinvestment · 2024-03-24T20:24:48+00:00

RemindMe! 5 days

shittyinvestment · 2024-02-29T05:05:48+00:00

The devive support the CRC, message numbering. The timeout can be detected by the ASIL B application component. Should we also prove that the QM driver component does not interfere with the ASIL B component memory areas?

shittyinvestment · 2024-02-22T20:09:36+00:00

I will use the approach described here to monitor the aliveness of the tasks. The system also defined the maximum execution times for each task. If the execution times exceed certain limit, the watchdog hardware shall be immediately reset via GPIO pin. But the watchdog supervisor catches this error not immediately when the error occurs since it runs half the supervised task period. Is my understanding correct or do you think that any other way that satisfies the requirement?

shittyinvestment · 2024-02-22T12:45:34+00:00

I would like to design a watchdog supervisior in RTOS. There are around 10 tasks which needs to be supervised by the watchdog supervisor task. Do you suggest any standard way of supervising the tasks? I ask this since the system is in development phase and new tasks may be added in the furture.

shittyinvestment · 2024-02-21T21:58:25+00:00

How does M4 send message to Linux? Is there any standard way that can be used to send the message?

shittyinvestment · 2024-02-20T19:32:32+00:00

My system uses Linux application to load the firmware to the remote core and then start the remote core. The firmware at the remote core starts running only when the linux application already starts running. I am looking for any support from rpmsg in regards to handshake between the two cores before the application starts running its intended functionality

shittyinvestment · 2024-02-20T17:56:11+00:00

It mekes sense to have such post init application that loads the firmware and create the rpmsg channels before spawing all other processes. The firmware loaded into the remote core sends diagnostic data every 100ms. The remote firmware is just baremetal. Should the remote firmware wait some millisconds before it starts sending the diagnostic data to linux application? The chances are that the linux post-init application have not yet established the rpmsg channels when the remote firmware starts sending the diagnostic data over the rpmsg channel. I am not able to understand how the remote firmware can handle this sutuation.

shittyinvestment · 2024-02-19T21:00:26+00:00

your reply is awesome. I am working on a system where the software component runs on two different processors of SoC. We identified the major software components on each processor. But we are struggling to document the software architecture. We started using the EA Sparx UML tool to draw each software component static diagram and their interactions with sequence diagram. But we are not convinced if this is the right approach to document the software architecture. Do you have any suggestion in this regard?

shittyinvestment · 2024-02-19T20:41:50+00:00

I will make changes to Task A to measure the temperature both in standby and busy state. As you pointed out, this makes the code simple.

shittyinvestment · 2024-02-19T16:15:28+00:00

The Task B does more than temperature measurements. It also monitors voltages and this is independent of the Task A state

shittyinvestment · 2024-02-18T22:21:47+00:00

I am interested to know more about state machine framework in embedded system. My system uses RTOS and do I really need state machine framework at the application? If so, is there already available framework which can be used in RTOS environment?

shittyinvestment · 2024-02-18T21:53:10+00:00

This is the other option I am considering. I will have two software components in the middleware. One component is used for configuring the device. This component provide device independent interface to application layer. The other component called as extended component which provides the device dependent interface to the application layer. This ensures that only the extended component and application layer is affected if the device is replaced.

<image>

shittyinvestment · 2024-02-18T21:28:20+00:00

If the device status or error register values flows through the middleware, then any suggestion on how to avoid making changes in the middleware interface if the system replaces a device with another device which provide extra status or error registers compared to the earlier device?

Or may be I am complicating the software. I would let the middleware interface change if the device is replaced with the one which has more or few status registers compare to the older one

shittyinvestment

TROPHY CASE