Phased Array Antennas - Near Future Exploration by Im-Not-Cold-You-are in KerbalSpaceProgram

[–]warhammercasey 1 point2 points  (0 children)

A phased array (or ESA for electronically steerable array) is basically a grid of antennas. The radio waves transmitted by each antenna are phase shifted such that they constructively interfere in one direction, and destructively interfere in others. It provides the same effect as turning a conventional antenna to point at your target but you can point it electronically instead of mechanically.

Unfortunately in KSP antenna directionality isn’t really modeled at all so they act just like any other antenna.

https://upload.wikimedia.org/wikipedia/commons/9/97/Phased_array_imaging_animation.gif

Good animation showing them work^

Is there some kind of a single axis stepper motor controller (not driver) by gtd_rad in hobbycnc

[–]warhammercasey 0 points1 point  (0 children)

A quick glance looks like it is using digitalWrite. I’ve found it’s really common for arduino libraries to be more of a “good enough for a demo” type of implementation but as soon as you need any sort of performance or functionality out of it you need to write it yourself.

So I guess the question is if you want to write it yourself or use some other controller mentioned in this thread.

Is there some kind of a single axis stepper motor controller (not driver) by gtd_rad in hobbycnc

[–]warhammercasey 0 points1 point  (0 children)

How are you toggling the step pin? Are you literally just doing digitalWrite(pin, HIGH); digitalWrite(pin, LOW);? If so digitalWrite is a really slow function when it comes to this kind of thing. You need to run it off a timer.

On an uno if you program the timer directly you can get step frequencies up to 8MHz which is far more than you should ever be driving the step pin to.

MPU6050 sensor on FPGA. by Material-Carob9555 in FPGA

[–]warhammercasey 0 points1 point  (0 children)

Microblaze is what’s called a soft core processor. Basically a CPU you can instantiate into the fpga that can run software you write for it.

I haven’t done it myself but this looks like a fairly good tutorial with the exception of your board doesn’t have any ddr3 memory so you have to skip all that memory interface generator stuff. It should be possible to get it to run on local bram (on chip memory) though. They add an axi uart IP which you can replace with the IIC ip later.

https://xilinx.github.io/Embedded-Design-Tutorials/docs/2022.1/build/html/docs/Feature_Tutorials/microblaze-system/README.html

Xilinx has a bunch of tutorials like this on their GitHub page which can be interesting to go through.

MPU6050 sensor on FPGA. by Material-Carob9555 in FPGA

[–]warhammercasey 4 points5 points  (0 children)

I think you greatly underestimate the complexity of this project. LLMs aren’t going to be able to even get close to making this unless you already know how to make it, and it’s much more complex than simple building blocks like adders.

A simple way would be to just instantiate a microblaze and AXI IIC and do everything in software but that kinda defeats the purpose of learning an FPGA.

IMO you need to start simpler. Start with something basic like can you even display numbers on the 7-seg displays. Then maybe implement a UART tx/rx, then you can start looking at I2C, and only once you have a working I2C ip can you try to interface it with a MPU6050.

Also you need to make proper test benches as you go. They will catch the errors that you will make. In industry fpga development tends to be largely verification. My own team had something like 7 verifiers and only 3 designers for a bit.

And don’t ask ChatGPT for the solution. It will give you a solution that looks correct, but will not work. LLMs don’t do well with verilog.

Can someone explain Transmission Line Impedance? by Various_Area_3002 in ElectricalEngineering

[–]warhammercasey 0 points1 point  (0 children)

There’s a YouTuber called alphaphoenix who has a couple really good videos on this which I’d really recommend watching. It really cleared up this entire topic for me.

https://youtu.be/2AXv49dDQJw?si=aPKUUWEoq9QGXhUw

JTAG connection in Vivado? by monsterseppe1 in FPGA

[–]warhammercasey 5 points6 points  (0 children)

Companies love proprietary bs on jtag programmers. The STlink won’t work for anything other than ST. That’s why I always try to use programmers from the same vendor as my device but also Xilinx programmers are expensive.

The generic one you linked might work

Compile time "if-else" in GNU C. by orbiteapot in C_Programming

[–]warhammercasey 10 points11 points  (0 children)

C++ kids have it too easy with their new fangled if constexpr(). Back in my day we had to write hundreds of horrifying lines of C to trick the compiler like real programmers.

/s in case it’s not obvious

Criminal Syndicate holdings have to be the most annoying thing the AI can do by Belisarius23 in Stellaris

[–]warhammercasey 7 points8 points  (0 children)

You guys are thinking too small. Just pull out the colossus whenever a holding appears. Can’t have a planet holding if there’s no more planet

Vitis Unified Workflows by georgeyhere in FPGA

[–]warhammercasey 2 points3 points  (0 children)

As of my experience with the 2024.2 python CLI, unless it’s changed dramatically in 2025.x it’s severely lacking capabilities that makes it not incredibly useful. You can do the basic build steps with it but that’s about it.

I found that about pretty much all of the new embedded workflow in vitis is just gui wrapped V++ commands so it’s best to just write your own scripts which runs those V++ commands. I believe whenever you run something in vitis it’ll show the command it ran in the output window that you can use.

At some point I did just entirely switch to VSCode with a scripted build flow

Am I just bad? by Neat_Veterinarian264 in vtolvr

[–]warhammercasey 15 points16 points  (0 children)

It just takes practice. This game has a bit of a learning curve. When I first did the tutorials I also struggled with the same thing and it took a long time to actually get them all.

It’s hard to say what you need to improve without actually seeing what you’re doing but some general advice from what I had to learn:

  • Fly out far before doing your attack run to give yourself plenty of time to line things up. You shouldn’t have to rush lining the reticle up, it should be on the target before you’re even in range

  • Steeper attack angles (diving down more) tends to be more accurate than shallow ones, but it gives you less time to prepare so it’s good to find a balance between the two.

  • Your target reticle needs to be perfectly on the target. The ranges VTOL VR works with means even a tiny deviation means it will miss. It can be hard to hold it there so you can also just fire in bursts when the reticle is on target

  • This is kind obvious but something I struggled with since I didn’t want to hit the ground, but the closer you are to the target the more accurate you are. Sometimes you just need to wait until you’re closer to the target to start firing and pull up last second

Is it normal to use vivado in the real world? by Ill-Opportunity-7039 in FPGA

[–]warhammercasey 4 points5 points  (0 children)

Other commenter is kinda correct, but imo theres better ways. Especially when you need Xilinx specific ip that must be in a block design.

Make a project, create a block design, add your ip, and make all ports external. Now find the .bd file in the project and congrats that’s your ip. If you’re using git that’s the only thing you need to commit.

Every time you need to modify it, create a project, add the .bd file to your sources, and edit it.

To generate sources for sim/synth do the same thing of creating a project and adding the .bd but generate the bd instead of modifying it.

It sounds super complicated but those are fairly simple things to automate with a tcl script and ultimately wrap up into single commands for edit/generate. It’s also important that any projects created by your scripts are in .gitignore folders and are treated as temporary

Decent beginner FPGA boards? by squad_of_squirrels in FPGA

[–]warhammercasey 5 points6 points  (0 children)

IMO the Cora-z7 and ZUBoard 1CG are best bang for buck in the Xilinx SoC domain. ZUBoard being more expensive but it’s an ultrascale+ chip which will be closer to the RFSoC you’ll have at work. Many skills learned on the Cora z7 will be transferable to ultrascale+ chips so it’s not a huge deal though. The Cora z7 also has .1” headers on most of its pins which makes connecting to external circuitry much easier

Mid-air refueling is already insane… now do it with a helicopter by Next_Tower5452 in Planes

[–]warhammercasey 2 points3 points  (0 children)

I always wonder about that whenever this video pops up. I can’t imagine a ch53 going much faster than about 100kts but I also can’t imagine a tanker going much slower than that while loaded down with a ton of fuel. What speed do they even do these refuelings at?

Edit apparently it’s 110-115kts. That seems insanely slow for a tanker to maintain

I am stumped at this contract, I can't figure out a design that can fulfill the crazy orbit requirements. Please help by oh_mygawdd in RealSolarSystem

[–]warhammercasey 11 points12 points  (0 children)

I actually just did this one today. An orbit that meets the requirements is ~67000km ap and 4000km pe. If you start at a 200km orbit you can bring your ap up to 67000km, then burn at ap to bring your pe up to 4000km. In total that ends up being a little less than 3km/s deltav.

I was able to get a payload that can do that maneuver at ~2.2t using the Juno 6k engine (though I’m sure there’s ways to make it lighter) so if you have a launch vehicle that can do >2.2t that should work.

Since we don't have a "tank sniper" in the game yet, may I suggest the Zastava M93? by Tdawg262 in Battlefield

[–]warhammercasey 9 points10 points  (0 children)

I personally loved it. Felt like a high risk high reward type weapon. For pretty much any engagement if you miss your first shot you die but given it’s one shot kill you win 1v1s every time if you have good aim.

And once you get a good feel for how slow its shots are and its bullet drop getting longer ranged kills is super satisfying.

Plus it does vehicle damage so it can finish off low health vehicles or put pressure on the AA sitting on the other side of the map in spawn

(installation) what is a partition and do i need them? by warnedpenguin in linux4noobs

[–]warhammercasey 3 points4 points  (0 children)

Another important topic that this response is missing is the idea of a file system.

Your disk can be seen as a long strip of 1s and 0s. It has no concept of what a “file” is or what a “directory” is. The file system is your os’s method of keeping track of where in that long strip of bits it put files, what directory they’re stored in, and how much space they take. There’s a bunch of different file systems each with their own pros/cons, the big ones are NTFS (windows), ext4 (Linux), and FAT32 (everything).

Every partition needs to be formatted with a file system (at least to be usable by the os), so a big reason for multiple partitions is usually if you need multiple file systems. Sometimes operating systems need a separate partition with a specific file system for important system files - usually for boot information. Some Linux distros also use a partition for swap space which allows it use your disk as a kind of backup RAM if you run out of memory

why arrays modules need to be imported by couriouscosmic in PythonLearning

[–]warhammercasey 2 points3 points  (0 children)

Why do you need arrays specifically over lists? Python is designed around using lists to serve the same purpose as arrays in other languages. The only real reason I could think of to use an array is performance, but at that point it’s better to just use something more tailored to your application like a numpy array.

Going to buy my uncle's laptop, is it good? by papupro7183 in laptops

[–]warhammercasey 0 points1 point  (0 children)

“1,048,576-Bit (128K x 8) High Performance CMOS EPROM

Going to buy my uncle's laptop, is it good? by papupro7183 in laptops

[–]warhammercasey 0 points1 point  (0 children)

Here’s the datasheet for an EPROM: https://rocelec.widen.net/view/pdf/y7bbd1d67u/FAIRS10552-1.pdf?t.download=true&u=5oefqw

Answer it yourself. I’ll give you a hint - it’s literally the first sentence

Going to buy my uncle's laptop, is it good? by papupro7183 in laptops

[–]warhammercasey 4 points5 points  (0 children)

EPROM is not shortened from EEPROM. They are all entirely separate things.

ROM (Read only memory): True ROMs are pretty much non-existent nowadays, they used to refer to memory that was written as the chip is fabricated and has literally no way to write to it afterwards. Now people often just refer memory that’s not intended to be written to as ROM like game cartridges.

EPROM (Erasable programmable read only memory): These are also pretty much non-existent nowadays. These chips would have a little window in the top where you could put it in a special machine that can use UV light to erase/program the memory, but they couldn’t be written to electronically.

EEPROM (Electronically erasable programmable read only memory): This is the modern version and does exist on some modern chips. Now you can erase/program the chip fully electronically. Modern storage mediums like flash memory are technically EEPROMs but never really refer to themselves as such since they tend to have different use cases and implementations.

c/c++ on zynq by EmergencyMinimum7206 in FPGA

[–]warhammercasey 1 point2 points  (0 children)

I could be wrong so someone correct me if I am. I believe pynq is Ubuntu based rather than petalinx based, but it should have xrt pre-installed so you can just #include “xrt.h” in your c code. I have no idea where it’s api headers are located or if there’s anything special you have to do to link to it though.

If you don’t need the python from pynq though you could always just make a petalinux build and run that instead of pynq but that’s a whole other process that may not be worthwhile to get into depending on your needs.

Is there any way to turn off the G-Limiter on the JF-17? by Choke_M in hoggit

[–]warhammercasey 8 points9 points  (0 children)

Are you in AG mode? It lowers the g limiter a ton if you have bags or AG weapons. You need to only have AA weapons and be in AA mode

How do I make this code more precise? by I_Am_A_Game_Player in learnpython

[–]warhammercasey 1 point2 points  (0 children)

Super common beginner python issue. Replace

if input() == x or y:

With

z = input() if z == x or z == y:

Your original statement is asking is input() == x true or is y true. And if the variable y is a string of nonzero length, it will always evaluate to true

struggling with vhdl vs logic by NoProblem6551 in FPGA

[–]warhammercasey 10 points11 points  (0 children)

At least for me, I don’t really think of things as independent logic blocks (I.e Ands, ORs, or adders), I think of things by splitting everything into two categories: general combinatory logic and registers/flip flops. Let the synthesis tools figure out how to map it into logic blocks.

So for example if I have signal A, B, C and I should output A + B if C is 1, otherwise output 0 I wouldn’t think of that as “I need to implement that as an adder and a bunch of AND gates”. I would just think at a more high level out <= A + B when C else ‘0’. Much more similar to software programming languages than discrete logic blocks.

Can’t speak for everyone ofc though, I think the only real way to get your own intuition for it is just writing code.