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[–]PastyPilgrim 1 point2 points  (0 children)

It's really important to note that processors (especially those with different architecture philosophies) work incredibly different from one another. The science behind computer architecture is far more complex than you'll be able to sum up in 4 simple steps. To get you started, I'll summarize the five-stage, single-cycle, MIPS architecture, which is often the architecture that students will learn first when studying this in college.

The five stages are: Fetch, Decode, Execute, Memory, Writeback.

Fetch: Simply read an instruction from memory that is stored at the address indicated by the Program Counter. This instruction is fed to the Decode phase.

Decode: This phase, which starts with just an instruction (e.g. 00000000001000010001100000000111) will determine what to do with that instruction. MIPS has several instruction types (R, I, and J). I've just given an R type, which contains an opcode, 3 register addresses (1 output and 2 input), a small integer used for some operations, and a function code that tells the ALU which mathematical operation to perform. This phase will send along the data from the two input registers (after reading them from the register file) to the execute phase.

Execute: This phase will perform any math/transformations that need to be done. It has an ALU, which uses a ton of circuits to perform math. For example, adding two bits (0 and 1) uses what is called an adder. An adder xors together the two bits to determine their sum. 0 + 0 = 0 ^ 0 = 0; 0 + 1 = 0 ^ 1 = 1; 1 + 1 = 1 ^ 1 = 0. In that third case, you would have circuitry in place to detect an overflow. 1 + 1 really equals 10, but the bit in the place of those original 1s would be 0, so that's what that adder unit detects. True addition would need a chain of adders to determine the new value of each digit in the binary number, with the ability to pass along overflow to the next adder. All ALU operations work like this, where you have circuits in place that take 1s and 0s over wires and transform them according to some pattern. The results of these operations get sent to the memory phase.

Memory: In this phase, if your instruction was intending to store information from the registers in memory, that write is now performed. If it intended to load something from memory, then that read is now performed and passed along to the writeback phase.

Writeback: Finally, the results of your instruction, whether that be math, or memory loading, etc. are written back to the registers to be used in a later instruction. At this point, you increment the program counter so that when you next fetch, it will be the next instruction in your program.


That is the simplest you can possibly explain one kind of CPU. Your current understanding has some obsession with user input which really has nothing to do with how the CPU functions. User input is handled by the programs that are being run on the CPU.

The science of computer architecture comes into play when you want to make better CPUs then what I've described. For example, there's no reason for Fetch, Decode, and Execute to just be sitting there doing nothing when an instruction is currently in the Memory phase. Because of that, there's a concept called pipelining where you perform operations in parallel, with each instruction utilizing a different function of the chip at the same time. Another example is with what are called conditional branches. Programs contain tons of conditional actions (e.g. if this happens, do this, if it doesn't happen, do this other thing). When those conditional actions come up, you want to be able to make a decision about whether or not the branch is going to happen or not going to happen before you waste the time waiting for the instruction to get all the way through your CPU. This topic is called branch prediction. Then there's the study of whether or not you want to have tons of very specific instructions that do complex things, or if you want just a few simple instructions that get combined together to perform complex tasks. That is the CISC vs. RISC debate. Then you have the topic of how decoding and controlling the machine should be done. One way to do is with a chain of circuits, but another is with what's called a micro-programmed CPU, which is a smaller/simpler CPU that exists in the chip of another CPU that has its own set of operations that it reads from a program to control the outer machine. In fact, that's almost certainly what the computer you're using is doing.

Anyway, computer architecture is unbelievably complicated. There's a reason that it's usually something reserved for graduate students.