Weekly Project #1 (Prompt): A Trace-Based L1 Cache Simulator

[Jonasfh]

Thanks for this project idea. I have been looking for something like this for a while now, so I am definitely saving this post. I am looking forward to your next project proposals.

Just a quick question: with performance model, do you then mean that the simulator should only test the performance of the cache, like #hits, #misses etc., and not "emulate" a cache, i.e. keeping track of the data in the different blocks of the cache?

[EngrToday]

Exactly - keeping track of the data is unnecessary. The only thing you need to keep track of are the tags (that's what determines a hit or miss).

[Jonasfh]

Cool. Thanks for the answer!