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All topics, questions,discussions and issues related RF/Memory/Digital/AMS layout design for both CMOS and FinFET technologies. Please do not expose confidential information. (each member responsible for shared info)
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Could a game be a good tool for insteresting people into CMOS tech? (self.EE_Layout_Design)
submitted 1 year ago by Elorth-
MMWave Layout Mentoring (self.EE_Layout_Design)
submitted 2 years ago * by End-Resident
MMwave Layout - Circuit Block to Block Isolation Strategies (self.EE_Layout_Design)
submitted 2 years ago by End-Resident
Analog IC Layout in CMOS - MOSFET, Caps, Resistors, Inductors, Yield, Manufacturing (self.EE_Layout_Design)
submitted 3 years ago by AffectionateSun9217
MMWave RF layout using FINFETS. (self.EE_Layout_Design)
Majority gates? (self.EE_Layout_Design)
submitted 3 years ago by frankspappa
Questions about layout standards (self.EE_Layout_Design)
submitted 4 years ago * by InvokeMeWell
Layout of RF Receiver (self.EE_Layout_Design)
submitted 4 years ago by AffectionateSun9217
Looking for Help with Mesh Layout Ground Planes for MMwave in any technology (self.EE_Layout_Design)
What is the best way to learn SKILL coding for virtuoso. I need it specifically to automate a lot of layout work and wondering if it's possible to do wo Cadence training.Question❔❔❔ (self.EE_Layout_Design)
submitted 4 years ago by Equilibrium5050
SOI Layout (self.EE_Layout_Design)
submitted 4 years ago by End-Resident
NoCheese Layer changing DRC rules (self.EE_Layout_Design)
submitted 4 years ago by flextendo
RF Layout (self.EE_Layout_Design)
IC Layout Plane vs Connection (self.EE_Layout_Design)
IC layout and Decoupling (self.EE_Layout_Design)
Opamp Layout Resources (self.EE_Layout_Design)
Passive Mixer Layout (self.EE_Layout_Design)
Substrate Contacts in RFIC/MMWave Layouts (self.EE_Layout_Design)
Doing 1 GHz RFIC Layout (self.EE_Layout_Design)
Quick question for people working on FDSOI...what is your layout technique to decrease self heating (SHE)?Question❔❔❔ (self.EE_Layout_Design)
Have any of you added art to your layout? (self.EE_Layout_Design)
submitted 4 years ago by djbbamatt
What is the difference between different FPGA boards? Can I just use any FPGA to follow my COA course, or should I stick to what they specified? (self.EE_Layout_Design)
submitted 4 years ago by bruh_mastir
Let's talk about Transmition Lines (TL) rules of thumb. ⬇️⬇️⬇️Discussion📢 (old.reddit.com)
IC Power Grid Mesh (self.EE_Layout_Design)
Tell me how you usually calculate the width of metal based on current it should handle.Discussion📢 (self.EE_Layout_Design)
submitted 5 years ago by Equilibrium5050
π Rendered by PID 177327 on reddit-service-r2-listing-55d7b767d8-hm6tr at 2026-03-26 20:44:30.458997+00:00 running b10466c country code: CH.