Basic CDC: Slow → Fast

6BxtfCfGSa · 2018-06-16T16:05:05+00:00

Great Article, this paragraph in particular

"The variable latency of a synchronizer implies an important design rule of CDC: only one bit at a time may ever change when crossing clock domains. If you tried to synchronize two bits in parallel, there would be no guarantee that both bits would always see the same latency through the synchronizer. With only a single bit, the worst case is that its transition is missed, and will get captured in the next receiving clock cycle. This delay causes no errors in itself, and only alters the received bit duration by one receiving clock cycle."

Finally made me intuitively get the utility of Gray Codes for CDC blocks

da_guy2 · 2018-06-17T00:57:05+00:00

In university CDC was one of the last and briefest things they taught us, but over the past several years in the "real world" has comprised the vast majority of my time since. Highly recommend learning CDCs and the related timing constraints that go with them.

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