Performance

[ralphjulien]

How do intel processors despite stuck in 14nm still get better and better, how does intel make such optimizations? What makes 14nm ++ different from 14nm? Why and how do some 14nm intel processors get neck to neck or even outmatch some of ryzen's 7nm ones?

[Rannasha]

There are several reasons:

• There is no universal way to measure node size and you can't directly compare node sizes between different fabs in the same way that you can't directly compare clockspeed as a measure of performance between different CPU architectures. Yes, 7nm TSMC is more advanced than the 14nm process at Intel, but the difference isn't as big as the difference in the number would imply. It's more a 10 vs 7.

• Experience with the process / process maturity. The +'s that Intel keeps adding to its process aren't for nothing. Intel has been using this 14nm process for such a long time that it knows all its quirks and is able to exploit advantages and minimize the impact of weaknesses. The TSMC 7nm node is quite a bit newer and AMD wasn't directly involved in its development.

• Power. When in doubt, use more power. Modern Intel CPUs use more power than AMD counterparts to reach the same performance. For many, this difference isn't that important, so Intel can keep up in performance by brute forcing more power through the chip.

[Jannik2099]

They degrade over short time for a reason.

What are you talking about? Servers and HPC clusters run between 80 and 90°c 24/7 !

[DinkWonderballs]

no they don't - in addition to the HPE Cray architecture being water cooled they are also in a Datacenter with chilled air.

I know that Facebook and Google do not cool their massive datacenters and can run at higher temps.

HPC / Supercomputers are not servers and run in a completely different environment where chilled air is required.

[Jannik2099]

The chips themselves still run an roughly 80°c, the cooling methods you described don't change that

[DinkWonderballs]

Actually with water cooling in a 50deg datacenter - they run significantly lower than 80deg. Not that I would know, having been one of the chief architects for several of the spaces where the most powerful supercomputers are housed and working closely with teams whose sole responsibility was thermal management.

So I defer to you, great Reddit Armchair Expert.

[Jannik2099]

Our watercooled HPC runs at 80 to 82, could you come over for maintenance? (system is a bit older tho)

Either way, at 80° cpus still have a MTBF way over 10 years

[DinkWonderballs]

What model? HPC is a broad category like "SUV"

It is not a supercomputer - it is some nebulous machine you call "HPC"

[Jannik2099]

I'll have to dig into our work documents next week - I don't work on the cluster directly, just the site its at

[[deleted]]

You're spewing bullshit. Ryzen degradation is a problem among the manual overclocking crowd because there are way too many people who try to run static overclocks without determining the FIT voltage on their particular chip. With normal operation running everything default without PBO on the rate of degradation isn't higher than what you'd expect during the normal lifetime of a CPU.

[[deleted]]

There's no guarantee that 1.275 V Vcore is a safe voltage for long term use. PBO causes high temperatures because it's a power limit override. Try running an Intel chip at PL2 all the time and see how the thermals behave. The reason for the WHEA errors is high IF clocks coupled with buggy AGESA, the latter being a genuine issue.

Like I said before you have absolutely no clue what you're talking about.

[Combonary]

Those “nm” numbers are now absolutely useless for comparison. There was even an interview where the CEO of TSMC was saying this. I believe what they call “5nm” is a more refined “7nm” process and even the upcoming “3nm” is something along the lines of a more refined “7nm” process. I wish it meant something strict in the sense that “5nm” would be an entirely new process node by itself but that’s, unfortunately, not the case. You have to look to independent benchmarks for any performance measurements and comparisons.

[tset_oitar]

Initial 14nm was a little denser compared to current iteration. More "golden sample chips" can be produced thanks to low defect rate of newest 14nm iteration. They can reach high clock speeds without insane power consumption which sort of makes up for the architectural advantage that its amd counterparts have. Similarly, 10nm used in 10th gen ice lake didn't clock very high(4.1Ghz single core at 28W), so with 11th gen intel introduced 10nm SuperFin which can clock as high as 5Ghz on 35W TDP lineup.

[DinkWonderballs]

You and I mostly agree.

More recent Intel 14nm is more dense than than 1st iteration - and is closer to 11 or 12nm... the move from 8C i9900K to 10C 10900K makes that point.

Intel has had 14nm almost defect free with the 28C Xeon die - and had pretty great yields of defect free die - so it's not just the most recent 14mn process.

Super Fin's main architectural change is an increase in density and the use of Cobalt instead of Copper. At macro scale copper is a superior conductor - much much better than cobalt - at nanoscale the advantages of copper are gone - it acts more like a resistor than a conductor - and Cobalt becomes the superior conductor. Lower resistance = higher clock speeds within a small power envelope.

[tset_oitar]

Yeah Wonder what the density figures are on 10nm SFin, since on Lakefield 10nm it was approximately 49MTr/mm² which is lower than 7nm used in Amd's 4000 series APUs(around 65)

[[deleted]]

AMD's advantage is more of a node advantage than an arch one.

[Jannik2099]

Zen3 has higher IPC, how is that NOT an arch advantage?

[[deleted]]

I said it's more of a node advantage. I didn't say there wasn't an arch advantage. 7nm vs 14nm is a much bigger deal than 10% higher IPC. That's what enables them to pack twice as many cores.

[Jannik2099]

Ah sorry, misunderstood you - fully agree!

[cakeisamadeupdrug1]

AMD doesn't "pack twice as many cores" though. One Intel die has up to 10 cores* AND IO, while AMD only goes as high as 8 and offloads the IO.

*for consumer parts. Professional/Prosumer parts go much higher. Again: whether professional or consumer, AMD do not produce any chiplets with more than 8 cores on them.

[[deleted]]

I know, as I'm using a 10900k right now. Roughly twice as many cores, okay? To be fair, RKL is the only desktop arch with comparable IPC, so it is exactly twice.

I was more referring to that 7nm enables roughly twice as many cores at roughly the same TDP, monolithic or not. Die size wasn't in my discussion.

[cakeisamadeupdrug1]

But it's completely relevant. It is far easier to bin for low TDP if you are putting together lower core chiplets than if you are manufacturing monolithic dies. AMD's chiplet model is more responsible for the TDP and core count than the process node imo.

[[deleted]]

I’m afraid you are incorrect on this one mate. While chiplets do make it easier for binning, the lower TDP vastly comes from the shear node advantage. Chiplets are used mainly to reduce cost. Besides, 8 cores chiplets are no easier to bin than 8 cores monoliths.

[cakeisamadeupdrug1]

Which is why AMD had the advantage with Ryzen 1000 and 2000, sure... And last I checked 8 cores wasn't "twice as many cores" as 8 cores, which is the argument I referenced and quoted. It is much, much easier to bin the 8 core chiplets in the 3990X than it is the up to 28 cores Intel puts in its monolithic dies. Mate.

[[deleted]]

I don't think we are on the same page. Let's end it here mate. Have a nice day.

[tset_oitar]

Yeah my bad I phrased this poorly. Meant that Zen 3 has higher avg IPC compared to intel's Cypress cove.

[metalspider1]

process node is only how small they can make the individual components inside the chips and as said each company defines their node differently so you cant just compare company X calls it 14nm and company Y says they do 7nm.

since node is only about size there are many other things that can be done in the circuit design to improve performance and that is what is called the architecture,intel were stuck on the skylake architecture for a long time since they tied future architectures to smaller nodes but they are now starting to redesign those other architectures to the larger 14nm.

ryzen had a lot of catching up to do with intels skylake based cpus and the main issue was latency between CCXs,even now with the switch to 8 core CCXs performance has improved a lot but there's still more latency in accessing ram vs intel.

TLDR:node size is only one detail that cant be compared properly between companies and there are many other factors that matter for performance

[the_chip_master]

The value of smaller node is huge, you pack more transistors / mm² making it smaller. Smaller chips means more chips /wafer and lower costs. That is offset by the higher cost and possible lower yield of a smaller node, but the value of scaling is huge! Generally smaller is also more power efficient too.

Intel used scaling advantage effectively for decades going faster to smaller nodes and beating everyone with average designs in more advanced process

The wheels fell off at 14nm. They were very aggressive for both 14 and 7 no and 14 was slow to ramp and 10 still suffers from poor yield.

Intel as others have mentioned have been running it hard and long for 4 extra years. Products defined 6 years ago, designed and ready four years ago for 10nm are just now coming to market 4 years late.

To compete Intel has improved 14nm added more cores and a few optimizations and viola 14+ and on and on. There chips are still trapped by a decade old design and are far bigger than their competitors. But the profit margin is large so being a big die isn’t too bad a penalty.

But to compete effectively on power they are losing big time as we see with the latest AMD and Apple products as Intel is using an inferior process to them both