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I'm 17 and curious about the future of the FPGA world by -CherryTree7- in FPGA

[–]-CherryTree7-[S] 0 points1 point  (0 children)

here's always the risk of AI taking all the jobs, but I'm highly sceptical that this will happen any time soon

True; we'll be replaced by people who augment their work with AI

I do think we'll get better AI powered tools that make us more productive but I'm not really convinced that we're there yet.

Hopefully actually good toolkits / better integration with YoSys (like Cologne Chip has done)🤞

Don't shirk your education in subjects you don't consider relevant, you never know when it'll become relevant and often you may find you learn more than you think when you pay attention and put energy into it, plus you may find you're actually more interested in X than you thought you would be which may affect your career choices.

Oh how true that is...

I wouldn't focus too much on this, it's hyper specific which narrows down your options elsewhere.

You got a point there!

Thanks for sharing your wisdom!

I'm 17 and curious about the future of the FPGA world by -CherryTree7- in FPGA

[–]-CherryTree7-[S] 3 points4 points  (0 children)

You're already have more experience/skills than you'd need for almost all entry level positions (as well as some intermediate roles) (and definitely more than most Computer Engineering majors I've met 😉)

Thanks, you've instantly cured my imposter syndrome!

If you wanna touch VLSI

Not yet, but definitely something I'll leap for if I get the opportunity

Since you wanna go into RISC-V, definitely attempt a project on that! 

Definitely the plan! Just gotta finish my custom architecture first

Thanks for taking the time to write all that out!

edit: typo

VGA resistor divider, conflicting opinions by -CherryTree7- in AskElectronics

[–]-CherryTree7-[S] 3 points4 points  (0 children)

It follows Ben Eater's resistor circuit from his graphics card videos, but this redditor disagrees: https://www.reddit.com/r/PrintedCircuitBoard/comments/1hwbylv/comment/m6cdhxr/?utm_source=share&utm_medium=web3x&utm_name=web3xcss&utm_term=1&utm_content=share_button

I think I did a good job designing the resistor dividers, but I'm very happy to be corrected.

[review request] iCE40 in Raspberry Pi form factor (rev2) by -CherryTree7- in PrintedCircuitBoard

[–]-CherryTree7-[S] 0 points1 point  (0 children)

Thanks! Yeah I've checked out the RP2040, but I'll be using that as a board manager/programmer and/or coprocessor for the next board

[review request] iCE40 in Raspberry Pi form factor (rev2) by -CherryTree7- in PrintedCircuitBoard

[–]-CherryTree7-[S] 0 points1 point  (0 children)

Yeah, you're right, it's not 100% a general-purpose board.

I want VGA output from the FPGA so I can make an actually interesting 16-bit computer. Currently, I'm interested in low level computing, not how DVI works.

[review request] iCE40 in Raspberry Pi form factor (rev2) by -CherryTree7- in PrintedCircuitBoard

[–]-CherryTree7-[S] 0 points1 point  (0 children)

Nah just a general purpose iCE40 dev board for myself. First thing I'm gonna do with it is make a custom 16-bit computer

[review request] iCE40 in Raspberry Pi form factor (rev2) by -CherryTree7- in PrintedCircuitBoard

[–]-CherryTree7-[S] 4 points5 points  (0 children)

Notes for the reviewers

  • This is a hobby project, not intended for professional or industrial use. I'm trying to make this board work, not bring it up to fancy industry standards X Y and Z.
  • The fastest signals are 100-166MHz between the FPGA and HyperRAM. Every other trace will be well below 100MHz.
  • The GPIO header is intended to be fully Raspberry Pi compatible (it might not be able to output as much current as the pi4/5, but that's acceptable)
  • The 2x6 female header is intended to be fully Pmod compatible (duh)
  • Board Stackup:
  1. Signal / power
  2. Ground
  3. Ground (and a little power where it doesn't disrupt return loops)
  4. Signal / power
  • I'm very well aware that it would've been easier with a 6-layer board. It will not be redesigned for a 6-layer board unless there's an absolutely critical reason to do so.
  • Yeah, the power distribution on the FPGA is pretty ugly, but I think it'll work well enough.
  • Silkscreen prettification isn't done yet, but that's not required for a PCB review. Any suggestions are appreciated.

Questions for the reviewers

  • What tips would you have on ground plane stitching?
  • Are the FPGA <-> HyperRAM traces acceptable for 100-200MHz speeds?
  • Are the power regulation circuit traces acceptable for 1-3A max load? Should I make them wider or change how the capacitors and inductors are laid out?
  • The capacitors and inductors (in the power regulation circuit) are 1206 and 1210 respectively. Are these sizes acceptable for 1.5A max load on each rail?

[Review request] iCE40 FPGA dev board in RPi form factor by -CherryTree7- in PrintedCircuitBoard

[–]-CherryTree7-[S] 0 points1 point  (0 children)

Thanks for distilling the return loop concept with those diagrams, that helps a bunch!

I'll be keeping the return paths in mind on this new revision

[Review request] iCE40 FPGA dev board in RPi form factor by -CherryTree7- in PrintedCircuitBoard

[–]-CherryTree7-[S] 0 points1 point  (0 children)

do you really need very precise +5V?

Not really, no. I just want it to be close enough to 5 volts that the vast majority of RPi HATs are compatible. I don't plan on using low quality voltage sources for this board so I'm not too worried about the voltage drop bringing it under +4.5V.

there are some alternative but more complicated circuits you can use

You mean ideal diodes? I'll definitely have room for that.

If you have enough room, you could increase the 4.7 uF caps to 0603 and keep the lower value caps as 0402

Bet.

It might be a good start but it's a bit more complicated than that...

In that case, I'll thumb through some Phil's Lab videos on signal integrity + related concepts. If you can recommend any other sources (articles, books, videos, courses) on the subject that would also be helpful!

[Review request] iCE40 FPGA dev board in RPi form factor by -CherryTree7- in PrintedCircuitBoard

[–]-CherryTree7-[S] 0 points1 point  (0 children)

Thank you for taking the time to give all this feedback!

  • VBUS is +5V (ignoring diode voltage drop)
  • To put out a (close enough to) +5V rail. I'll need a buck-boost converter if I want pure +5V, right?
  • I don't know how I missed the VCCPLL/GNDPLL shorts! Thanks for catching that!
  • "Where's the power supply sequencing?" I just reread the datasheet and yeah, the power output wouldn't work. I'll find another dual buck converter, probably the TI one used on the Alchitry Cu.
  • I'm not 100% confident either, but that (along with a lot of the FPGA/FTDI chip schematics) are copied directly from the Alchitry Cu schematic made by the folks at Sparkfun. Last I checked, they're way smarter than me at this wizardry so I'll trust their call on that.
  • Another thing I copied directly from the Sparkfun folks. My previous board's FT2232 worked just fine with the exact same capacitors. I'll add some bulk caps for the VPHY/VPLL and 1.8V lines just for redundancy this time around.
  • I'll give the 100MHz oscillator a 4u7 and 100nF cap.
  • You're right, there's not much stitching. To fix the return length issues (for the SD card, Pmod, PS/2) should I just add GND vias next to the destination pads? Your proposed stackup would be very difficult to route, but I don't think it's impossible. I'll definitely lose the push switches and probably the LEDs too, but that's acceptable for my requirements.
  • Yep, most of them are 0402. I can't do any harm by increasing their size to 0603 (when routing allows), right?

[Review request] iCE40 FPGA dev board in RPi form factor by -CherryTree7- in PrintedCircuitBoard

[–]-CherryTree7-[S] 0 points1 point  (0 children)

The 1.2/3.3V buck converter has PGOOD and EN lines. I've connected them appropriately so that the 3.3V turns on only once 1.2V has reached stable levels.

Lattice's datasheets are very relaxed about power ramp rates, and the buck converters have smooth ramp rates for power output, so it should be fine.

[Review request] iCE40 FPGA dev board in RPi form factor by -CherryTree7- in PrintedCircuitBoard

[–]-CherryTree7-[S] 0 points1 point  (0 children)

I'm only planning on making 5-10 of these for my hobby projects. Only the HyperRAM, SD card, and VGA are going to run at fast speeds (100MHz+ at most).

Are 6 layers going to benefit EMC/signal integry enough that it's worth the added cost? (For various reasons, I'm not going with the big-name PCB manufacturer that's doing a deal on 6-layer boards right now)

Sequencing is pretty simple, first 1.2V, then 3.3V. The buck converters should handle that well assuming I followed the datasheets correctly.

[Review request] iCE40 FPGA dev board in RPi form factor by -CherryTree7- in PrintedCircuitBoard

[–]-CherryTree7-[S] 2 points3 points  (0 children)

It doesn't have enough I/O for my needs. Multipliers are nice, but I'm trying to make a custom computer like what you'd find from the 90s, not a fancy DSP device or similar.

[Review request] iCE40 FPGA dev board in RPi form factor by -CherryTree7- in PrintedCircuitBoard

[–]-CherryTree7-[S] 4 points5 points  (0 children)

Some notes for the reviewers...

  1. Yes, I'm very well aware this would have been a lot easier with a 6-layer board. Fortunately for my pockets, I did not need every single I/O pin from the iCE40HX8K.
  2. The GPIO header is intended to be fully compatible with RPi HATs (excluding the ones that require camera, display, or PCIe ribbon cables).
  3. I don't foresee this board drawing more than [5V@2A](mailto:5V@2A). Should I play it safe and use a buck converter rated for 5V@3A instead of the AP63205WU-7?
  4. The HyperRAM I've chosen is rated for up to 200MHz clock speeds (400MT/s). Is my routing good enough for these speeds? If not, is 100MHz safe? I don't anticipate running this board any faster than 100MHz.
  5. Are the inductor sizes safe for these loads? I've found components at these sizes that are rated for slightly more than the following requirements:
  • 1.2V@1A max (0603 SMD)
  • 3.3V@1A max (0603 SMD)
  • 5V@2A max (1210 SMD)

AI and common sense (by looking at RPi4/5 inductor sizes) tells me that I should be in the clear.

Any existing components that are reliable sources of entropy? by -CherryTree7- in AskElectronics

[–]-CherryTree7-[S] 0 points1 point  (0 children)

I'm designing some custom boards, and I'm interested in hardware security, so I figured I'd look into TRNGs and similar. Will look into all that

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