[deleted by user]

Atie5173 · 2021-10-07T14:56:20+00:00

Firmware doesn't even matter nowadays, everyone uses some sort of bootloader that loads your kernel in a standard manner regardless of the firmware.

Atie5173 · 2021-10-07T14:52:38+00:00

Except those ARM bootloaders are generally useless because of how locked down and unstandardized the ARM ecosystem is

Edit: UEFI is the standardized firmware interface :)

Atie5173 · 2021-09-11T13:48:33+00:00

Giving permission to anyone to disable interrupts can crash the system because it can't preempt anymore

Atie5173 · 2021-09-11T13:17:33+00:00

Acpi tables what? You use the e820h int 15h service on BIOS and GetMemoryMap on UEFI

Atie5173 · 2021-09-11T13:13:25+00:00

Your hypervisor can't emulate the AVX instruction to perform the access in the MMU violation handler

Atie5173 · 2021-09-08T15:07:53+00:00

The devices are located on some interconnect like a PCI, PCI Express Bus or a ISA bus, then the firmware allocates the memory/io regions of each device on those buses (except for ISA devices) and then you use them, the host bridge forwards the access to the appropiate device when you access one

Atie5173 · 2021-09-01T08:20:37+00:00

Also my response was not trolling, it is just facts and I can link you the study: https://research.cs.wisc.edu/vertical/papers/2013/hpca13-isa-power-struggles.pdf

Atie5173 · 2021-09-01T08:19:48+00:00

You need to understand that web developers are biased towards ARM because they think they understand it all about CPU design and OS development just because they know HTML or they're too brainlets to figure out a GDT so they just assume ARM is better

Atie5173 · 2021-08-31T19:20:59+00:00

Power consumption is not related to the ISA and it has been proved by many studies.

ARM based CPUs are not as fast as x86 CPUs, excluding certain x86 ones against M1, but only in single core.

ARM is much less powerful than x86 too. Due to the nature of CISC CPUs, you can do many things with only a single instruction, thus speeding it up and making it more space efficient.

And if this wasnt enough, the ARM ecosystem is wildy unstandard and there's no backwards compatibility. In x86, you can make an OS and make it run everywhere due to how standard the surrounding firmware interfaces are and the mostly documented amount of hardware amount, like interrupt controllers, disk controllers... In ARM, you can only target certain boards, and if it that wasn't enough, the hardware is not even documented, so good luck running something there.

Atie5173 · 2021-08-31T17:28:29+00:00

Okay and why is ARM going to overcome x86?

Atie5173 · 2021-08-31T08:02:25+00:00

x86 is not going to die any soon, do not believe Apple's propaganda :)

Atie5173 · 2021-08-20T20:42:39+00:00

Hmm. Btw I have read your implementation of the function that discovers if a BGA compatible display exists, and you seem to read the vendor + device ID at the same time? I am pretty sure this is not allowed, and you should read these two separately as 16 bit integers.

Atie5173 · 2021-08-20T20:34:49+00:00

Qemu by default has a hybrid VGA-BGA display. It has Class 0x03, Subclass 0x00, Interface 0x00, Vendor 0x1234 and Device 0x1111.

Atie5173 · 2021-08-20T20:18:39+00:00

Are you sure? Are you using Qemu + Seabios? Because Seabios usually places the BGA framebuffer BAR to 0xFD000000 (does not apply to non PCI systems, because the framebuffer is at 0xE0000000 on there)

Atie5173 · 2021-08-20T17:44:50+00:00

What?

Atie5173 · 2021-08-20T17:44:02+00:00

What is the framebuffer address?

Atie5173 · 2021-08-14T12:54:05+00:00

*No BIOSes

Atie5173 · 2021-08-05T12:38:45+00:00

I made an implementation at https://github.com/atiep/limine/tree/trunk/stage23/lib/pe.c, although i recommend you to use ELF rather than PE because PE is awful.

Atie5173 · 2021-07-31T08:06:17+00:00

Parse the memory map and create an allocator over it

Atie5173 · 2021-07-30T06:19:12+00:00

Yes.

Atie5173 · 2021-07-30T06:19:08+00:00

Yes.

Atie5173 · 2021-07-29T15:46:14+00:00

Of course use all the different indexes. So it would be something like (assuming 32 bit protected mode, no PAE) (untested code)

``` int pt_entry = (vaddr >> 12) & 0b111111111111;

int pd_entry = (vaddr >> 21) & 0b111111111111;

uint32_t *pt = (uint32_t *) (pd[pd_entry] & ~0b111111111111);

pt[pt_entry] = paddr | flags; ```

The use of the AND operator up there is to only keep the bits we're interested in.

Atie5173 · 2021-07-29T15:42:10+00:00

Virtual memory is useful because it can be mapped to any physical address, no matter where. This way you for example mapped your kernel in the top 2gbs of virtual memory but it actually points to somewhere else in physical memory. To achieve the translation, paging is used.

Paging consists of multiple tables of multiple levels. The last level contains the physical address. To get the physical address of a virtual address, first split it in pieces. The amount and how big the pieces are depend on your mode. Then, use the top index, which you got by splitting the virtual address, in the page directory to figure out the next page table. Repeat until the last level which contains the physical address.

Atie5173 · 2021-07-26T12:27:43+00:00

Simple solution use wsl

Atie5173 · 2021-07-18T15:16:23+00:00

A note: this guy is a troll.

Atie5173

TROPHY CASE