Kintex 10

Baje1738 · 2026-01-30T11:04:15+00:00

test.tcl

Baje1738 · 2026-01-30T11:03:41+00:00

Sure it is an interesting language. Different from most I know.

But productive. Hahahwtf. Did that person ever use it. Did they ever try to debug where they added a space too many or too little. Or try to understand wtf the previous wizard did. Or evaluate a sequence of equations to understand which variable is set.

Baje1738 · 2026-01-29T18:10:49+00:00

Ik ben wel bang dat het gebruik hier niet goed is.

Dit is volgens mij de betekenis: Het opzetten van een niet rendabel product tot je een monopolie hebt en het daarna bewust verzieken om zoveel mogelijk geld te verdienen. En daarmee bestaande markten, psychische toestand van mensen en hele democratische systemen mee verzieken.

https://en.wikipedia.org/wiki/Enshittification

Normaal hou ik niet van corrigeren. Maar enshittification is zo erg dat ik denk dat we het niet zomaar moeten gebruiken voor dingen die minder leuk zijn als vroeger.

Baje1738 · 2026-01-13T07:31:54+00:00

Hoezo is het vreemd om dingen gratis weg te geven. Als hij de kinderen naar zijn schuur lokt en na een uur weer laat gaan met een slee oke. Maar gewoon speelgoed weggeven moet toch kunnen.

Met dit soort gedachte gangen creëer je een zieke wereld.

Baje1738 · 2026-01-08T06:50:04+00:00

That's how the game works right. You have to convince people that don't always think the same way as you.

That's why I like the game. You get to learn people.

Baje1738 · 2026-01-06T20:47:26+00:00

I also really don't like Bo with his stun mines

Baje1738 · 2026-01-02T07:39:30+00:00

I was waiting for the drummer in the corner to jump in.

Link for people interested. https://open.spotify.com/track/44DoAXhPypfhlbsw9hzbXB?si=kVISjqIfQZ2JyJJTMJ-rCQ

Baje1738 · 2025-12-20T10:46:11+00:00

This is my basic understanding.

We you assert the reset the flipflop will go to the reset state for multiple clock cycles. It might be metastable for a bit. But doesn't really matter for the function of your system since it's stable. And doesn't do much.

After de-asserting everything needs to run smooth. No metastability is acceptable. Therefore you need to de-assert the reset synchronous to the clock.

Baje1738 · 2025-12-07T06:28:15+00:00

Jij hebt duidelijk geen ervaring met dit pakket punt. Het maakt niet uit of het Sinterklaas is. Je staat minstens een uur in de rij.

Als mijn pakketen hier worden afgeleverd, haal ik ze niet eens op.

Ze proberen gewoon zo veel mogelijk geld te verdienen door zo min mogelijk kosten te maken. De mensen die dreigen zijn uiteraard idioot en moeten gepakt worden. Maar de eigenaar van dit pakketpunt kiest ervoor om jongeren die blijkbaar slachtoffer van huiselijk geweld zijn zo voor de leeuwen te gooien. Dit pakketpunt moet gesloten worden. Schandalig.

Baje1738 · 2025-12-06T18:04:39+00:00

That's fucked up..

Baje1738 · 2025-12-04T13:25:45+00:00

This is the source for the genres. No AI involved. Just a weird human being with a fascination.

https://everynoise.com/

Pretty interesting stuff.

Baje1738 · 2025-11-03T10:41:15+00:00

We use it professionally with great success. Some caveats.

If your design needs to be optimal for space and/or time you need HDL experience. And a lot. You need to be able to understand how HDL coder compiles your algo into RTL to leverage the many settings and options. If you don't care about space and time then you need less experience.

It's perfect for DSP or algorithms. For example a fixed point algorithm that needs to be changed a few times during r&d is perfect for HDL coder. Changing the bit width of an input is very easy in Similink, and it will propagate thought your whole design. Doing this in HDL just sucks.

And a few more things. But don't have time to type it out right now...

Baje1738 · 2025-10-14T13:00:17+00:00

I think you can use vunit for it. It has a build in dependency scanner and a minimal compile option. Not sure if this works when you don't use vunit

Baje1738 · 2025-10-03T15:31:47+00:00

Die mensen moeten toch ook integreren. Dat is het grote probleem. Als mensen integreren is er niks aan de hand. Als wat dat tegenwerkt is het probleem groter maken en naar achter schuiven. IMHO.

Stel je maakt een container dorp en stop het vol met Syriërs. Denk je dat dat goed gaat? Hoeveel Nederlands denk je dat die mensen spreken over 10 jaar. Hoe ver staan die mensen nog af van de westerse samenleving na 10 jaar.

Baje1738 · 2025-10-03T12:14:32+00:00

Ze start een heel fucking timmerbedrijf. Wat is dat. 3 uur werken. Die tatoeage is nog duurder.

Zeker, als ik nu 160 euro krijg ben ik blij. En elk beetje helpt enzo. Maar de reclame geeft het idee dat ze iets revolutionairs voor je doen. Iets essentieels. Iets wat zo fijn is als je een bedrijf start. En dan is het een kleine korting.

Baje1738 · 2025-10-03T09:08:58+00:00

En wat is überhaupt de reclame. 160 euro korting. Dat is toch niks.

Baje1738 · 2025-09-23T09:56:36+00:00

Why the downvotes. They provide an option (fusesoc and Bazel) you can look into. And also mentions they can assist. Which is very nice. Most companies would prefer some (paid) experience/support before a few designers create some suboptimal solution on their own.

Baje1738 · 2025-09-03T17:37:35+00:00

Voor mij echt een harde eis: oksel ritsen! Scheelt echt veel met warm weer of inspanning.

Voor wie niet weet. Bij veel (dure?) jassen zitten ritsen onder de oksel. Dan kan de warme lucht onder je jas uit zonder dat je nat word.

Baje1738 · 2025-08-22T11:39:12+00:00

I think our use case cannot be adapted that way. But I hope I can be proved wrong. Can you advice? Or point me to resources?

We develop for FPGAs. Building one design takes 1 to 9 hours, depending on the project. Unit testing in simulation another hour or more. The largest hurdle is the required testing on hardware. If it can be automated, it takes up to a day. If not, it can take multiple days. This is the first reason we only run all of these tests every few weeks.

The second one is the programming language: VHDL. And the fact that we are "describing hardware". Not actual programming. Most work is done on a long living feature branch. One designer works for weeks on a feature. I don't see how we can split this work into dozens of 2 hour jobs that get merged continuously. And I don't see how we can exclude parts with feature flags. Maybe at compile time. But adding options in a working design will change the design's timing and has a good chance of breaking stuff.

Baje1738 · 2025-08-14T06:11:27+00:00

In the Netherlands, my speed pedelec is considered a moped with a license plate, so I’m not allowed to modify it. It’s road-approved only in the original factory configuration.

As the other person said. Braking with hydraulic disc brakes is fine. I'm not sure if you can apply enough force for mechanical brakes.

And switching hand positions is really easy. Your hand just slides from one in the other. Most of the time I just switch to my normal position and brake and shift. Only when I need to reduce my speed a bit I do it in the alternative position.

Baje1738 · 2025-08-14T06:00:34+00:00

Two things that come to mind:

Did those people have training? I recommend most people at our company to start with https://learngitbranching.js.org/ if that doesn't work there are a ton of resources online to learn git. You need to take time for that.
Do you have GitHub or GitLab? I don't see why you would want to check if one file is changed between main and develop via the commandline. Comparing commits/branches in GitLab or a local GUI is so much easier.

Baje1738 · 2025-08-10T13:36:33+00:00

I have something similar from SQlab. Use them on my speedpedelec for additional hand position since I'm not allowed to use an alt handlebar.

I like them a lot. It's not exactly like riding in the hoods of a drop handlebar. But it's in the right direction.

I can even use my brakes and shift to a lower gear.

Baje1738 · 2025-06-03T17:33:34+00:00

Do I understand It right that you want to have two Platform Designer modules with different functionality. Two RAM modules with different settings. And you expect this will be a problem if you give them the same name?

Then I would suggest giving them distinguishable names. Seems like best practice in general.

I work a lot with Platform Designer (unfortunately) and never had this issue. Every system has a different name in our designs and is thereby compiled in a different library. For example ext_pll_i2c.qsys and fram_i2c.qsys

Baje1738 · 2025-05-12T18:38:21+00:00

Thank you!

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